Patents by Inventor Sheng-Jui Huang

Sheng-Jui Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10075181
    Abstract: According to at least one aspect, a delta sigma modulator circuit is provided. The delta sigma modulator circuit includes a first signal processor circuit configured to receive an input signal and a feedback signal and generate a processed signal using the input signal and the feedback signal, a quantizer configured to generate a digital code using the processed signal, a second signal processor circuit configured to receive the digital code, segment the digital code to form a segmented digital code that is smaller in size than the digital code, and generate a rotated digital code using the segmented digital code at least in part by rotating the segmented digital code to compensate for an excess loop delay in the circuit, and an digital-to-analog converter (DAC) configured to receive the rotated digital code and generate the feedback signal using the rotated digital code.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: September 11, 2018
    Assignee: MediaTek Inc.
    Inventors: Sheng-Jui Huang, Nathan Egan, Divya Kesharwani, Michael A. Ashburn, Jr., Frank Op 't Eynde
  • Publication number: 20180006661
    Abstract: According to at least one aspect, a delta sigma modulator circuit is provided. The delta sigma modulator circuit includes a first signal processor circuit configured to receive an input signal and a feedback signal and generate a processed signal using the input signal and the feedback signal, a quantizer configured to generate a digital code using the processed signal, a second signal processor circuit configured to receive the digital code, segment the digital code to form a segmented digital code that is smaller in size than the digital code, and generate a rotated digital code using the segmented digital code at least in part by rotating the segmented digital code to compensate for an excess loop delay in the circuit, and an digital-to-analog converter (DAC) configured to receive the rotated digital code and generate the feedback signal using the rotated digital code.
    Type: Application
    Filed: September 13, 2017
    Publication date: January 4, 2018
    Inventors: Sheng-Jui Huang, Nathan Egan, Divya Kesharwani, Michael A. Ashburn, JR., Frank Op 't Eynde
  • Publication number: 20170194984
    Abstract: A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Inventors: Sheng-Jui Huang, Michael A. Ashburn, JR., Divya Kesharwani, Nathan Egan
  • Patent number: 9634687
    Abstract: A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: April 25, 2017
    Assignee: MEDIATEK INC.
    Inventors: Sheng-Jui Huang, Michael A. Ashburn, Jr., Divya Kesharwani, Nathan Egan
  • Publication number: 20160365870
    Abstract: A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.
    Type: Application
    Filed: March 14, 2016
    Publication date: December 15, 2016
    Inventors: Sheng-Jui Huang, Michael A. Ashburn, JR., Divya Kesharwani, Nathan Egan
  • Patent number: 8928511
    Abstract: A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: January 6, 2015
    Assignee: Mediatek Inc.
    Inventors: Yu-Hsin Lin, Hung-Chieh Tsai, Sheng-Jui Huang
  • Patent number: 8552894
    Abstract: A sigma-delta modulator includes a front portion and a hybrid portion to form a loop filter. The front portion includes integrator(s) and feed-forward path(s), and is arranged to provide a front signal by combining signals of the integrator(s) and feed-forward path(s). The hybrid portion is coupled to the front portion, and arranged to provide a filtered signal by combining an integration of the front signal and a weighting of the front signal. The filtered signal is quantized, converted from digital to analog, and fed back to the loop filter.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: October 8, 2013
    Assignee: Mediatek Inc.
    Inventors: Sheng-Jui Huang, Chen-Yen Ho
  • Patent number: 8471743
    Abstract: A quantization circuit includes a quantizer and a compensation circuit. The quantizer includes a voltage-to-phase converter and a phase difference digitization block. The voltage-to-phase converter is arranged for generating a phase signal according to an input voltage. The phase difference digitization block is arranged for generating a quantization output according to a phase difference between a phase of the phase signal and a reference phase input. The compensation circuit is arranged for applying compensation to the phase difference digitization block according to the quantization output.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: June 25, 2013
    Assignee: Mediatek Inc.
    Inventor: Sheng-Jui Huang
  • Patent number: 8462960
    Abstract: A signal processing system and related method are disclosed. The signal processing system includes a signal processing module, powered by a low supply voltage, for processing signals; and an interface module, coupled to the signal processing module, powered by a high supply voltage, for outputting signals generated from the signal processing module; wherein the interface module comprises a plurality of high-voltage functional blocks integrated therein, and each of the functional blocks is configured to perform a predetermined interface functionality. In this way, the bill-of-material (BOM) cost can be reduced.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: June 11, 2013
    Assignee: Mediatek Inc.
    Inventors: Sheng-Jui Huang, Yung-Yu Lin, Jen-Che Tsai, Tzueng-Yau Lin, Yau-Wai Wong, Chih-Horng Weng, Chi-Hui Wang
  • Patent number: 8344921
    Abstract: A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information, wherein an order of the truncater is lower than an order of the integration.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Mediatek Inc.
    Inventors: Yu-Hsin Lin, Hung-Chieh Tsai, Sheng-Jui Huang
  • Publication number: 20120319881
    Abstract: A sigma-delta modulator includes a front portion and a hybrid portion to form a loop filter. The front portion includes integrator(s) and feed-forward path(s), and is arranged to provide a front signal by combining signals of the integrator(s) and feed-forward path(s). The hybrid portion is coupled to the front portion, and arranged to provide a filtered signal by combining an integration of the front signal and a weighting of the front signal. The filtered signal is quantized, converted from digital to analog, and fed back to the loop filter.
    Type: Application
    Filed: April 19, 2012
    Publication date: December 20, 2012
    Applicant: MEDIATEK INC.
    Inventors: Sheng-Jui Huang, Chen-Yen Ho
  • Publication number: 20120112943
    Abstract: A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information, wherein an order of the truncater is lower than an order of the integration.
    Type: Application
    Filed: March 28, 2011
    Publication date: May 10, 2012
    Inventors: Yu-Hsin Lin, Hung-Chieh Tsai, Sheng-Jui Huang
  • Publication number: 20120112936
    Abstract: A quantization circuit includes a quantizer and a compensation circuit. The quantizer includes a voltage-to-phase converter and a phase difference digitization block. The voltage-to-phase converter is arranged for generating a phase signal according to an input voltage. The phase difference digitization block is arranged for generating a quantization output according to a phase difference between a phase of the phase signal and a reference phase input. The compensation circuit is arranged for applying compensation to the phase difference digitization block according to the quantization output.
    Type: Application
    Filed: July 25, 2011
    Publication date: May 10, 2012
    Inventor: Sheng-Jui Huang
  • Patent number: 7893855
    Abstract: An exemplary continuous-time delta-sigma analog-to-digital converter includes a loop filter, a quantizer, a dynamic element matching circuit, a latch, and a digital-to-analog converter (DAC). The loop filter contains a plurality of integrators coupled in series, including a first integrator and a second integrator; a first positive feedback resistive element, placed in a first positive feedback path between a first output node of the second integrator and a first input node of the first integrator; and a first negative feedback resistive element, placed in a first negative feedback path between a second output node of the second integrator and a second input node of the first integrator. The quantizer is implemented using a domino quantizer. The DAC contains a plurality of DAC units each having a capacitive device, a resistive device, and a switch device coupled between the capacitive device and the resistive device.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: February 22, 2011
    Assignee: Mediatek Inc.
    Inventor: Sheng-Jui Huang
  • Patent number: 7872599
    Abstract: A loading stage for outputting an amplified differential output, including: a noise source inducing noises originally located in a first frequency band, and a first modulating device coupled to the noise source for modulating the noises into a second frequency band from the first frequency band.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: January 18, 2011
    Assignee: Mediatek Inc.
    Inventor: Sheng-Jui Huang
  • Publication number: 20110007845
    Abstract: A communication receiver includes a mixer, a filter group and an analog-to-digital converter. The mixer is used for mixing an input signal with a local oscillation signal to generate a mixed signal. The filter group is coupled to the mixer, and is used for filtering the mixed signal to generate a filtered signal, where the filter group includes a first one-pole filter, a second one-pole filter, and a complex-pole filter. The analog-to-digital converter is coupled to the filter group, and is used for performing an analog-to-digital converting operation on the filtered signal to generate a digital signal.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 13, 2011
    Inventors: Yen-Horng Chen, Sheng-Jui Huang
  • Patent number: 7859439
    Abstract: A processing apparatus for calibrating an analog filter of a communication device in a digital domain is disclosed, wherein the analog filter is arranged to perform a filtering operation upon a communication signal in an analog domain. The processing apparatus includes a signal processing circuit and a digital filter. The signal processing circuit is used for transforming the communication signal between the digital domain and the analog domain. The digital filter is coupled to the signal processing circuit, and used for performing a filtering operation upon the communication signal in the digital domain, wherein a frequency response of the digital filter is arranged to compensate a frequency response of the analog filter according to at least a compensation parameter generated with reference to a frequency-related characteristic of the analog filter.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: December 28, 2010
    Assignee: Mediatek Inc.
    Inventors: Pei-Wei Chen, Sheng-Jui Huang
  • Publication number: 20100253558
    Abstract: A processing apparatus for calibrating an analog filter of a communication device in a digital domain is disclosed, wherein the analog filter is arranged to perform a filtering operation upon a communication signal in an analog domain. The processing apparatus includes a signal processing circuit and a digital filter. The signal processing circuit is used for transforming the communication signal between the digital domain and the analog domain. The digital filter is coupled to the signal processing circuit, and used for performing a filtering operation upon the communication signal in the digital domain, wherein a frequency response of the digital filter is arranged to compensate a frequency response of the analog filter according to at least a compensation parameter generated with reference to a frequency-related characteristic of the analog filter.
    Type: Application
    Filed: April 7, 2009
    Publication date: October 7, 2010
    Inventors: Pei-Wei Chen, Sheng-Jui Huang
  • Publication number: 20100066577
    Abstract: An exemplary continuous-time delta-sigma analog-to-digital converter includes a loop filter, a quantizer, a dynamic element matching circuit, a latch, and a digital-to-analog converter (DAC). The loop filter contains a plurality of integrators coupled in series, including a first integrator and a second integrator; a first positive feedback resistive element, placed in a first positive feedback path between a first output node of the second integrator and a first input node of the first integrator; and a first negative feedback resistive element, placed in a first negative feedback path between a second output node of the second integrator and the first second input node of the first integrator. The quantizer is implemented using a domino quantizer. The DAC contains a plurality of DAC units each having a capacitive device, a resistive device, and a switch device coupled between the capacitive device and the resistive device.
    Type: Application
    Filed: June 17, 2009
    Publication date: March 18, 2010
    Inventor: Sheng-Jui Huang
  • Patent number: 7675448
    Abstract: In a continuous-time sigma-delta modulator, by using dynamic element matching (DEM) with respect to comparators of a quantizer, or by generating a plurality of candidate DEM results in advance for selecting an approximate DEM result, a time slot for DEM operations in each cycle of a sampling signal is significantly increased without being rushed.
    Type: Grant
    Filed: September 1, 2008
    Date of Patent: March 9, 2010
    Assignee: Mediatek Inc.
    Inventors: Sheng-Jui Huang, Yung-Yu Lin