Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.

Abstract: An image sensing device and a control device of an illumination device thereof are provided. The control device includes a control circuit, an operation circuit, and multiple driving signal generators. The control circuit generates multiple control signals. The operation circuit performs a logical operation on the control signals and an image capturing signal to generate multiple operation results. The driving signal generator respectively provides multiple driving signals to the illumination device according to the operation results, and the driving signals respectively have multiple different output powers.

Abstract: A high-voltage transistor device includes a semiconductor substrate, an isolation structure, a gate dielectric layer, a gate, a source region and a drain region. The semiconductor substrate has a plurality of grooves extending downward from a surface of the semiconductor substrate to form a sawtooth sectional profile. The isolation structure is disposed on the outside of the plurality of grooves, and extends from the surface downwards into the semiconductor substrate to define a high-voltage area. The gate dielectric layer is disposed on the high-voltage area and partially filled in the plurality of grooves. The gate is disposed on the gate dielectric layer. The source region and the drain region are respectively disposed in the semiconductor substrate and isolated from each other.

Abstract: A fin transistor structure is provided. The fin transistor structure includes a first substrate. An insulation layer is disposed on the first substrate. A plurality of fin structures are disposed on the insulation layer. A supporting dielectric layer fixes the fin structures at the fin structures at waist parts thereof. A gate structure layer is disposed on the supporting dielectric layer and covers a portion of the fin structures.

Abstract: A semiconductor structure includes a substrate, a buried oxide layer formed in the substrate and near a surface of the substrate, a gate dielectric layer formed on the substrate and covering the buried oxide layer, a gate structure formed on the gate dielectric layer and overlapping the buried oxide layer, and a source region and a drain region formed in the substrate and at two sides of the gate structure.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: A semiconductor structure includes a substrate, a buried oxide layer formed in the substrate and near a surface of the substrate, a gate dielectric layer formed on the substrate and covering the buried oxide layer, a gate structure formed on the gate dielectric layer and overlapping the buried oxide layer, and a source region and a drain region formed in the substrate and at two sides of the gate structure.

Abstract: A high-voltage transistor device includes a semiconductor substrate, an isolation structure, a gate dielectric layer, a gate, a source region and a drain region. The semiconductor substrate has a plurality of grooves extending downward from a surface of the semiconductor substrate to form a sawtooth sectional profile. The isolation structure is disposed on the outside of the plurality of grooves, and extends from the surface downwards into the semiconductor substrate to define a high-voltage area. The gate dielectric layer is disposed on the high-voltage area and partially filled in the plurality of grooves. The gate is disposed on the gate dielectric layer. The source region and the drain region are respectively disposed in the semiconductor substrate and isolated from each other.

Abstract: A high-voltage transistor device includes a semiconductor substrate, an isolation structure, a gate dielectric layer, a gate, a source region and a drain region. The semiconductor substrate has a plurality of grooves extending downward from a surface of the semiconductor substrate to form a sawtooth sectional profile. The isolation structure is disposed on the outside of the plurality of grooves, and extends from the surface downwards into the semiconductor substrate to define a high-voltage area. The gate dielectric layer is disposed on the high-voltage area and partially filled in the plurality of grooves. The gate is disposed on the gate dielectric layer. The source region and the drain region are respectively disposed in the semiconductor substrate and isolated from each other.

Abstract: A fin transistor structure is provided. The fin transistor structure includes a first substrate. An insulation layer is disposed on the first substrate. A plurality of fin structures are disposed on the insulation layer. A supporting dielectric layer fixes the fin structures at the fin structures at waist parts thereof. A gate structure layer is disposed on the supporting dielectric layer and covers a portion of the fin structures.

Abstract: A fin transistor structure is provided. The fin transistor structure includes a first substrate. An insulation layer is disposed on the first substrate. A plurality of fin structures are disposed on the insulation layer. A supporting dielectric layer fixes the fin structures at the fin structures at waist parts thereof. A gate structure layer is disposed on the supporting dielectric layer and covers a portion of the fin structures.

Abstract: A high-voltage transistor device includes a semiconductor substrate, an isolation structure, a gate dielectric layer, a gate, a source region and a drain region. The semiconductor substrate has a plurality of grooves extending downward from a surface of the semiconductor substrate to form a sawtooth sectional profile. The isolation structure is disposed on the outside of the plurality of grooves, and extends from the surface downwards into the semiconductor substrate to define a high-voltage area. The gate dielectric layer is disposed on the high-voltage area and partially filled in the plurality of grooves. The gate is disposed on the gate dielectric layer. The source region and the drain region are respectively disposed in the semiconductor substrate and isolated from each other.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: A semiconductor structure includes a substrate, a buried oxide layer formed in the substrate and near a surface of the substrate, a gate dielectric layer formed on the substrate and covering the buried oxide layer, a gate structure formed on the gate dielectric layer and overlapping the buried oxide layer, and a source region and a drain region formed in the substrate and at two sides of the gate structure.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: An oxide semiconductor field effect transistor (OSFET) includes a first insulating layer, a source, a drain, a U-shaped channel layer and a metal gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed in the first insulating layer. The U-shaped channel layer is sandwiched by the source and the drain. The metal gate is disposed on the U-shaped channel layer, wherein the U-shaped channel layer includes at least an oxide semiconductor layer. The present invention also provides a method for forming said oxide semiconductor field effect transistor.

Abstract: A fin transistor structure is provided. The fin transistor structure includes a first substrate. An insulation layer is disposed on the first substrate. A plurality of fin structures are disposed on the insulation layer. A supporting dielectric layer fixes the fin structures at the fin structures at waist parts thereof. A gate structure layer is disposed on the supporting dielectric layer and covers a portion of the fin structures.

Abstract: A driving apparatus and a driving signal generating method are provided. The driving apparatus includes a timing controller, a driver, a switch and a resistor. The timing controller generates a bi-direction lock signal. The driver receives a differential signal pair. The switch is turned on or cut off according to an eye diagram detection result of the differential signal pair. According to the bi-direction lock signal, the timing controller and the driver are used to: operate a first clock and data recovery (CDR) operation on the differential signal pair during a first time period; set setting parameters of an output differential voltage, a pre-emphasis circuit and an equalizer according to the eye diagram detection result and an on/off state of the switch, and perform a second CDR operation during a second time period; and drive a display according to the differential signal pair during a third time period.