Patents by Inventor Sher Jiung Fang

Sher Jiung Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210063531
    Abstract: Transmitters having increased efficiency, such as may be useful in millimeter-wave devices. A semiconductor device, comprising a transmitter, comprising a modulator configured to receive a differential input signal having a first frequency and provide a differential modulated signal having the first frequency and a first clock phase; a series comprising one or more frequency multipliers, wherein the series of frequency multipliers is configured to receive the differential modulated signal and provide a differential second signal having a second frequency greater than the first frequency and having a second clock phase; and an output transformer configured to receive the differential second signal and transform the differential second signal to a single-ended output signal. Methods of using such transmitters. Systems for manufacturing devices comprising such transmitters.
    Type: Application
    Filed: August 31, 2019
    Publication date: March 4, 2021
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang
  • Publication number: 20200313269
    Abstract: Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.
    Type: Application
    Filed: March 31, 2020
    Publication date: October 1, 2020
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang, Abdellatif Bellaouar
  • Patent number: 10644374
    Abstract: Power combiners having increased output power, such as may be useful in millimeter-wave devices. The power combiner comprise at least two channels, wherein each channel comprises a phase alignment circuit, wherein the phase alignment circuit comprises a first differential input subcircuit comprising a first inverter and a second inverter, and a second differential input subcircuit comprising a third inverter and a fourth inverter, wherein the first inverter, the second inverter, the third inverter, and the fourth inverter each comprise a PMOS transistor and an NMOS transistor each having an adjustable back gate bias voltage. By adjusting the back gate bias voltage, the phases of the signal through each channel may be aligned, which may increase the output power of the power combiner. Methods of increasing output power of such power combiners. Systems for manufacturing devices comprising such power combiners.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: May 5, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: See Taur Lee, Sher Jiung Fang, Abdellatif Bellaouar