Patents by Inventor Shigeharu Asao
Shigeharu Asao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140306944Abstract: A method of driving a plasma display apparatus in which first electrodes and second electrodes are arranged adjacently and third electrodes are arranged to cross the first and second electrodes and in which one field comprises plural subfields having a reset period followed by an address period and a sustain period is provided. The method includes in the reset period in at least two of the subfields, applying a first waveform having a voltage that gradually increases in time to a first reached voltage to the second electrodes, and thereafter, applying a second waveform having a voltage that gradually decreases in time to the second electrodes, wherein the first reached voltages applied in at least two subfields of the subfields are different.Type: ApplicationFiled: June 24, 2014Publication date: October 16, 2014Inventors: Yoshikazu Kanazawa, Shigeharu Asao
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Publication number: 20140300590Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: ApplicationFiled: June 19, 2014Publication date: October 9, 2014Applicant: HITACHI MAXELL, LTD.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8797237Abstract: A plasma display apparatus and method are provided. The plasma display apparatus includes a plasma display panel in which first electrodes and second electrodes are arranged adjacently and third electrodes are arranged to cross the first and second electrodes. The method for driving a plasma display apparatus in which first electrodes and second electrodes are arranged adjacently and third electrodes are arranged to cross the first and second electrodes and in which one field comprises subfields having a reset period followed by an address period and a sustain period includes in a reset period, applying to second electrodes a voltage of a first waveform in which an applied voltage value increases according to a lapse of time and applying to second electrodes a voltage of a second waveform in which an applied voltage value decreases according to a lapse of time.Type: GrantFiled: September 23, 2011Date of Patent: August 5, 2014Assignee: Hitachi Maxell, Ltd.Inventors: Yoshikazu Kanazawa, Shigeharu Asao
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Patent number: 8791933Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: GrantFiled: September 25, 2013Date of Patent: July 29, 2014Assignee: Hitachi Maxell, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20140022224Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.Type: ApplicationFiled: September 25, 2013Publication date: January 23, 2014Applicant: HITACHI CONSUMER ELECTRONICS CO., LTD.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8558761Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: October 15, 2013Assignee: Hitachi Consumer Electronics Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8344631Abstract: A method for driving a plasma display panel in which a plurality of first and second electrodes are arranged adjacently each other, a plurality of third electrodes are arranged to cross the first and second electrodes, the plasma display panel having a reset period, an address period, and a sustain discharge period is provided. The method includes in the reset period, applying to the second electrodes a first waveform voltage, whose applied potential increases with time, then applying to the second electrodes a second waveform voltage, whose applied potential decreases with time.Type: GrantFiled: August 8, 2011Date of Patent: January 1, 2013Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20120075276Abstract: A plasma display apparatus and method are provided. The plasma display apparatus includes a plasma display panel in which first electrodes and second electrodes are arranged adjacently and third electrodes are arranged to cross the first and second electrodes. The method for driving a plasma display apparatus in which first electrodes and second electrodes are arranged adjacently and third electrodes are arranged to cross the first and second electrodes and in which one field comprises subfields having a reset period followed by an address period and a sustain period includes in a reset period, applying to second electrodes a voltage of a first waveform in which an applied voltage value increases according to a lapse of time and applying to second electrodes a voltage of a second waveform in which an applied voltage value decreases according to a lapse of time.Type: ApplicationFiled: September 23, 2011Publication date: March 29, 2012Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Yoshikazu Kanazawa, Shigeharu Asao
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Publication number: 20120032602Abstract: A method for driving a plasma display panel in which a plurality of first and second electrodes are arranged adjacently each other, a plurality of third electrodes are arranged to cross the first and second electrodes, the plasma display panel having a reset period, an address period, and a sustain discharge period is provided. The method includes in the reset period, applying to the second electrodes a first waveform voltage, whose applied potential increases with time, then applying to the second electrodes a second waveform voltage, whose applied potential decreases with time.Type: ApplicationFiled: August 8, 2011Publication date: February 9, 2012Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8094092Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.Type: GrantFiled: July 11, 2008Date of Patent: January 10, 2012Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Yoshikazu Kanazawa, Shigeharu Asao
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Patent number: 8022897Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 20, 2011Assignee: Hitachi Plasma Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8018168Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 13, 2011Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 8018167Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: September 13, 2011Assignee: Hitachi Plasma Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 7906914Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: August 21, 2007Date of Patent: March 15, 2011Assignee: Hitachi, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Patent number: 7868852Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.Type: GrantFiled: March 13, 2007Date of Patent: January 11, 2011Assignee: Fujitsu Hitachi Plasma Display Ltd.Inventors: Yoshikazu Kanazawa, Shigeharu Asao
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Patent number: 7825875Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: January 19, 2006Date of Patent: November 2, 2010Assignee: Hitachi Plasma Patent Licensing Co., Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20080309651Abstract: Provided is a technology related to a PDP apparatus and capable of realizing the efficiency improvement in the processing of a control circuit including the processing between a control circuit (waveform generating circuit unit) and a non-volatile memory (waveform ROM). In a control circuit of a PDP apparatus, an SFM (serial flash memory) is used as a non-volatile memory, and waveform decoding data and a waveform decoding address set are stored as a first waveform in the SFM. An LSI (waveform generating circuit LSI) stores the data from the waveform decoding data in a first SRAM in an internal SRAM unit and stores the data corresponding to one reading cycle (for example one SF) selected from the waveform decoding address set in a second SRAM in the internal SRAM unit.Type: ApplicationFiled: February 6, 2008Publication date: December 18, 2008Inventors: Shigeharu ASAO, Toshio Ueda
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Publication number: 20080278418Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.Type: ApplicationFiled: July 11, 2008Publication date: November 13, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Yoshikazu KANAZAWA, Shigeharu ASAO
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Patent number: 7345667Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: GrantFiled: September 14, 2005Date of Patent: March 18, 2008Assignee: Hitachi, Ltd.Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
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Publication number: 20070296649Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.Type: ApplicationFiled: August 21, 2007Publication date: December 27, 2007Applicant: HITACHI, LTD.Inventors: Noriaki SETOGUCHI, Shigeharu ASAO, Yoshikazu KANAZAWA