Patents by Inventor Shigeki Kameyama
Shigeki Kameyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8947324Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: GrantFiled: July 11, 2008Date of Patent: February 3, 2015Assignee: Hitachi Maxell, Ltd.Inventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Patent number: 7944407Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: GrantFiled: August 12, 2005Date of Patent: May 17, 2011Assignee: Fujitsu Hitachi Plasma Display LimitedInventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Publication number: 20100141691Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: ApplicationFiled: February 4, 2010Publication date: June 10, 2010Applicant: FUJITSU HITACHI PLASMA DISPLAYInventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Publication number: 20080284687Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: ApplicationFiled: July 11, 2008Publication date: November 20, 2008Applicant: FUJITSU HITACHI PLASMA DISPLAYInventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Publication number: 20050264489Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: ApplicationFiled: August 12, 2005Publication date: December 1, 2005Applicant: FUJITSU HITACHI PLASMA DISPLAYInventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Patent number: 6882114Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a different kind of color, separators which separate the plural kinds of phosphors, and discharge cells having sustain electrode pairs which create discharges producing the light emissions from the phosphors. In the plasma display panel, sustain discharge currents through the sustain electrode pairs in the discharge cells are set at different values according to respective brightness of the lights emitted from the plural kinds of phosphors.Type: GrantFiled: December 28, 2001Date of Patent: April 19, 2005Assignee: Fujitsu LimitedInventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
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Patent number: 6593693Abstract: A plasma display panel having a high power efficiency by reducing parasitic capacitances comprises first and second substrates disposed facing each other, a plurality of address lines formed on the first substrate and extending along a first direction and a plurality of X and Y electrodes formed on the second substrate and extending along a second direction crossing the first direction. A first dielectric layer covers the X and Y electrodes formed on the second substrate, the first dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate, and a trench formed at least through the first dielectric layer in an area between two adjacent X and Y electrodes, the trench extending along the second direction.Type: GrantFiled: June 20, 2000Date of Patent: July 15, 2003Assignee: Fujitsu LimitedInventors: Akihiro Takagi, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi, Noriaki Setoguchi
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Patent number: 6512501Abstract: A method for driving a plasma display panel applies, within a subfield among the n subfields, a narrow-width pulse having a pulse width equal to or less than 2 &mgr;s to first electrodes in order to cause an erase discharge while terminating a discharge caused between the first and second electrodes, and applies a voltage pulse to third electrodes so that the voltage pulse falls at the same time as the narrow-width pulse falls.Type: GrantFiled: July 15, 1998Date of Patent: January 28, 2003Assignee: Fujitsu LimitedInventors: Keishin Nagaoka, Shigetoshi Tomio, Tadatsugu Hirose, Keiichi Kaneko, Shigeki Kameyama, Tomokatsu Kishi, Tetsuya Sakamoto, Takahiro Takamori, Akihiro Takagi
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Publication number: 20020154073Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.Type: ApplicationFiled: August 15, 2001Publication date: October 24, 2002Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
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Publication number: 20020047582Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a respective, different kind of color, separators which separate the plural kinds of phosphors and discharge cells having sustain electrode pairs which create discharges producing the light emissions from the phosphors. In the plasma display pane, sustain discharge currents through the sustain electrode pairs in the discharge cells are set respective, different values according to respective brightnesses of the lights emitted from the plural kinds of phosphors.Type: ApplicationFiled: December 28, 2001Publication date: April 25, 2002Applicant: FUJITSU LIMITEDInventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
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Publication number: 20020033669Abstract: A rear substrate with a plurality of second discharge electrodes formed thereon is disposed so to face a front substrate with a plurality of first discharge electrodes formed thereon. A display area is formed in a part where the first discharge electrodes of the front substrate and the second discharge electrodes of the rear substrate face each other. A sealing member is disposed in between the peripheral parts of the front substrate and the rear substrate, and the substrates are laminated to each other via the sealing member. A shielding member is disposed between the display area and the sealing member. By disposing the shielding member in the plasma display panel, an area outside the display area of the rear substrate is not visible from the front substrate side, thereby improving the quality of appearance of the plasma display panel.Type: ApplicationFiled: September 12, 2001Publication date: March 21, 2002Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITEDInventors: Yoshikazu Kanazawa, Shigeki Kameyama, Takeshi Kuwahara
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Patent number: 6353292Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a different kind of color, separators which separate the plural kinds of phosphors and discharge cells having sustain electrode pairs which create discharges to create the light emissions from the phosphors. In the plasma display panel, a sustain discharge current through each sustain electrode pair in the discharge cells is set a different value according to a brightness of each light emitted from the plural kinds of phosphors.Type: GrantFiled: January 20, 2000Date of Patent: March 5, 2002Assignee: Fujitsu LimitedInventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
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Patent number: 5959619Abstract: A display for performing gray-scale display according to a subfield method, in which the frame memory area is minimized, has been disclosed. The display comprises: a main unit including a video signal source and a display interface having a frame memory; a display panel unit including a matrix panel for performing gray-scale display according to the subfield method, a driver for driving the matrix panel, and a display control unit for receiving display signals from the display interface in the main unit and controlling the driver according to the display signals; and a cable for linking the main unit and display panel unit. The display interface transmits display signals covering one frame in units of a subfield. This obviates the necessity of a frame memory that is employed in a known display adopting a CRT interface as an interface between the main unit and display panel unit and that is used to convert display signals adapted to the CRT interface into those adapted to the subfield method.Type: GrantFiled: March 7, 1996Date of Patent: September 28, 1999Assignee: Fujitsu, LimitedInventors: Shigeki Kameyama, Tomokatsu Kishi
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Patent number: 5956014Abstract: In a plasma display panel, an analogue brightness value given by a variable resistor is periodically converted into a digital brightness value and stored in a memory. A digital brightness value of a current period is compared with the digital brightness value of the next preceding period stored in the memory, to produce a difference brightness value which is compared with a predetermined brightness value and, if larger than the predetermined value, the brightness value stored in the memory is updated. Alternatively, power consumption of a display device is detected and, when the power consumption is larger than a set point, a brightness value is gradually decreased and, when the power consumption is smaller than the set point, the brightness value is gradually adjusted to a brightness set value.Type: GrantFiled: October 18, 1995Date of Patent: September 21, 1999Assignee: Fujitsu LimitedInventors: Hirohito Kuriyama, Keiichi Kaneko, Rikurou Tanahashi, Akira Yamamoto, Shigeki Kameyama, Masaya Tajima, Shigetoshi Tomio, Tomokatsu Kishi
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Patent number: 5844373Abstract: A power supply which inputs a first direct-current voltage from the outside and outputs a high direct-current voltage to a plasma display panel. The power supply connects the input direct-current voltage to a positive polarity side of a first capacitor of a plurality of N capacitors connected in series to each other and connects a negative polarity side of the first capacitor to a ground (step 1); connects the input direct-current voltage to a positive polarity side of an Mth capacitor of the N capacitors and connects a negative polarity side of the Mth capacitor to the ground (step 2); repeats step 2 for M=2 to N (step 3); and outputs a voltage of the positive polarity side of the first capacitor to the plasma display panel (step 4).Type: GrantFiled: August 19, 1997Date of Patent: December 1, 1998Assignee: Fujitsu LimitedInventors: Shinpei Yao, Shigeki Kameyama, Tomokatsu Kishi, Tetsuya Sakamoto
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Patent number: 5828353Abstract: A triple-electrode planar display capable of achieving further power saving has been disclosed. A drive unit is dedicated to a planar display having a display panel in which cells being arranged in the form of a matrix and having a memory function and discharge glow function are formed, in which one of each pair of electrodes on the same substrate which are responsible for discharge glow is a common electrode connected in common. The drive unit includes a common electrode drive circuit for applying an alternating voltage to the common electrode, and a power save circuit that when the common electrode is changed from a high potential to a low potential, restores and accumulates power applied to the common electrode, and that when the common electrode is changed from the high potential to the low potential, applies accumulated power to the common electrode.Type: GrantFiled: June 21, 1996Date of Patent: October 27, 1998Assignee: Fujitsu LimitedInventors: Tomokatsu Kishi, Kyoji Kariya, Tadatsugu Hirose, Shigetoshi Tomio, Yoshimasa Awata, Shigeki Kameyama, Kazuo Yoshikawa, Akira Otsuka
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Patent number: 5786794Abstract: A flat panel display has a low withstand voltage and performs high speed line sequential scanning and recovers power. An AC type panel display has electrodes arranged in a matrix form, a push-pull type driver circuit, having first and second transistors, provided for each pair of plural pairs, of power supply lines connected to a driver circuit for driving a plurality of display electrodes to be scanned and a power supply which supplies a defined voltage to one of the respective power supply lines of each pair connected to the corresponding driver circuit, and a leakage control switch which leaks the defined voltage applied to the power supply line.Type: GrantFiled: May 17, 1995Date of Patent: July 28, 1998Assignee: Fujitsu LimitedInventors: Tomokatsu Kishi, Shigeki Kameyama, Kazuo Yoshikawa, Akira Otsuka, Tadatsugu Hirose
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Patent number: 5621623Abstract: When a MOS transformer switch 14 shifts from an ON state to an OFF state, a fly-back spike voltage is induced from a secondary winding 122 to a primary winding 121. As a result electric charge accumulates in a capacitor 281, via a diode 283 and a voltage, i.e. is the voltage of a battery 10 on to which the voltage between terminals of the capacitor 281 is stacked, is supplied to the DC power-supply voltage input terminal Vcc of a control circuit 16 via a LC low pass filter 34A. Energy stored in the capacitor 281 may be effectively utilized, while the fly-back spike voltage to the control circuit 16 side is cut by a LC low pass filter 34A.Type: GrantFiled: March 9, 1995Date of Patent: April 15, 1997Assignee: Fujitsu LimitedInventors: Hirohito Kuriyama, Keiichi Kaneko, Shigeki Kameyama, Rikurou Tanahashi, Akira Yamamoto