Patents by Inventor Shigeki Ohtsuka

Shigeki Ohtsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11715976
    Abstract: Disclosed herein is a coil component that includes a first coil pattern wound in a planar spiral shape. At least one turn constituting the first coil pattern is divided into a plurality of lines by a spiral slit, and a space width between the plurality of lines differs depending on a planar position.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: August 1, 2023
    Assignee: TDK CORPORATION
    Inventors: Noritaka Chiyo, Toshio Tomonari, Shigeru Kaneko, Shigenori Hirata, Akihito Watanabe, Hirohumi Asou, Junpei Hayama, Shigeki Ohtsuka, Takahiro Ohishi, Takaaki Imai, Tomohiro Moriki, Takakazu Maruyama
  • Patent number: 11594363
    Abstract: Disclosed herein is a coil component that includes first and second substrates, a first coil pattern formed on one surface of the first substrate, a second coil pattern formed on one surface of the second substrate, a first terminal electrode connected to one end of the first coil pattern and protruding from the first substrate, and a second terminal electrode connected to one end of the second coil pattern and protruding from the second substrate. The first and second substrates are laminated such that the first and second terminal electrodes overlap each other and are connected to each other.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: February 28, 2023
    Assignee: TDK CORPORATION
    Inventors: Tomohiro Moriki, Takahiro Ohishi, Hirohumi Asou, Noritaka Chiyo, Toshio Tomonari, Junpei Hamaya, Shigeki Ohtsuka, Takaaki Imai, Takakazu Maruyama, Osamu Taguchi
  • Publication number: 20200381167
    Abstract: Disclosed herein is a coil component that includes first and second substrates, a first coil pattern formed on one surface of the first substrate, a second coil pattern formed on one surface of the second substrate, a first terminal electrode connected to one end of the first coil pattern and protruding from the first substrate, and a second terminal electrode connected to one end of the second coil pattern and protruding from the second substrate. The first and second substrates are laminated such that the first and second terminal electrodes overlap each other and are connected to each other.
    Type: Application
    Filed: April 27, 2020
    Publication date: December 3, 2020
    Applicant: TDK CORPORATION
    Inventors: Tomohiro MORIKI, Takahiro OHISHI, Hirohumi ASOU, Noritaka CHIYO, Toshio TOMONARI, Junpei HAMAYA, Shigeki OHTSUKA, Takaaki IMAI, Takakazu MARUYAMA, Osamu TAGUCHI
  • Publication number: 20200274392
    Abstract: Disclosed herein is a coil component that includes a first coil pattern wound in a planar spiral shape . At least one turn constituting the first coil pattern is divided into a plurality of lines by a spiral slit, and a space width between the plurality of lines differs depending on a planar position.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 27, 2020
    Inventors: Noritaka CHIYO, Toshio TOMONARI, Shigeru KANEKO, Shigenori HIRATA, Akihito WATANABE, Hirohumi ASOU, Junpei HAYAMA, Shigeki OHTSUKA, Takahiro OHISHI, Takaaki IMAI, Tomohiro MORIKI, Takakazu MARUYAMA
  • Patent number: 10284388
    Abstract: A communication system includes a transmission path and multiple nodes. At least one of the multiple nodes includes a second communication portion and a control portion in addition to a first communication portion. When the control portion performs a high speed communication, the control portion shifts the first communication portion included in each of the remaining multiple nodes to a sleep mode. The second communication portion performs a differential communication at a higher speed than the first communication portion using a differential signal. In the differential signal, a maximum of a potential difference between the pair of communication lines is equal to or less than a recessive threshold value, and a minimum of the potential difference between the pair of communication lines is a negative voltage value that has a polarity opposite to the recessive threshold value of the first communication portion.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: May 7, 2019
    Assignee: DENSO CORPORATION
    Inventors: Tomohisa Kishigami, Shigeki Ohtsuka, Nobuaki Matsudaira, Hironobu Akita
  • Publication number: 20180205572
    Abstract: A communication system includes a transmission path and multiple nodes. At least one of the multiple nodes includes a second communication portion and a control portion in addition to a first communication portion. When the control portion performs a high speed communication, the control portion shifts the first communication portion included in each of the remaining multiple nodes to a sleep mode. The second communication portion performs a differential communication at a higher speed than the first communication portion using a differential signal. In the differential signal, a maximum of a potential difference between the pair of communication lines is equal to or less than a recessive threshold value, and a minimum of the potential difference between the pair of communication lines is a negative voltage value that has a polarity opposite to the recessive threshold value of the first communication portion.
    Type: Application
    Filed: June 13, 2016
    Publication date: July 19, 2018
    Inventors: Tomohisa KISHIGAMI, Shigeki OHTSUKA, Nobuaki MATSUDAIRA, Hironobu AKITA
  • Patent number: 9722819
    Abstract: A distortion compensation system includes a first communication node including a first reception unit including an equalizer configured by a first digital filter unit and a first transmission unit including an emphasis circuit configured by a second digital filter unit, and a second communication node including a second transmission unit transmitting a training pattern before receiving normal data from the first communication node. The equalizer converges a filter constant of the first digital filter unit so that an error of the received training pattern is converged. The first transmission unit performs a distortion compensation using the converged filter constant of the first digital filter unit as at least a part of a filter constant of the second digital filter unit of the emphasis circuit, and then transmits the data.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: August 1, 2017
    Assignee: DENSO CORPORATION
    Inventors: Hironobu Akita, Shigeki Ohtsuka, Nobuaki Matsudaira, Takahisa Yoshimoto
  • Publication number: 20160241422
    Abstract: A distortion compensation system includes a first communication node including a first reception unit including an equalizer configured by a first digital filter unit and a first transmission unit including an emphasis circuit configured by a second digital filter unit, and a second communication node including a second transmission unit transmitting a training pattern before receiving normal data from the first communication node. The equalizer converges a filter constant of the first digital filter unit so that an error of the received training pattern is converged. The first transmission unit performs a distortion compensation using the converged filter constant of the first digital filter unit as at least a part of a filter constant of the second digital filter unit of the emphasis circuit, and then transmits the data.
    Type: Application
    Filed: September 22, 2014
    Publication date: August 18, 2016
    Inventors: Hironobu AKITA, Shigeki OHTSUKA, Nobuaki MATSUDAIRA, Takahisa YOSHIMOTO
  • Patent number: 9350422
    Abstract: A communication system includes multiple communication nodes and a communication line. The multiple communication nodes include a master and multiple slaves. The communication line cascade-connects the communication nodes and supplies electricity. The communication line corresponds to a feeder line. Each of the communication nodes is connected with the communication line through an inductor to be supplied with electricity. The each of the communication nodes is AC coupled to the communication line to transmit and receive a communication signal. The master and the slaves perform a bidirectional communication. A communication slave is provided. The communication slave is connected with a communication line through an inductor to be supplied with electricity. A communication master is provided.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: May 24, 2016
    Assignee: DENSO CORPORATION
    Inventors: Nobuaki Matsudaira, Shigeki Ohtsuka, Hironobu Akita
  • Patent number: 9300461
    Abstract: In a reception circuit, in a first operating mode, the operation of at least a first charge pump circuit of a phase frequency comparator, the first charge pump circuit, samplers other than a specific sampler in samplers provided in a multi-phase sampler, and a data reproducing unit stops. In a second operating mode, the operation of at least a second charge pump circuit of a phase comparator and the second charge pump circuit stops.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: March 29, 2016
    Assignee: DENSO CORPORATION
    Inventors: Hironobu Akita, Shigeki Ohtsuka
  • Patent number: 9276785
    Abstract: A waveform equalization apparatus includes an A/D converter, a waveform equalizer, a training sequence generator, a clock recovery circuit, multiple matched filters, and a clock optimization logic. The A/D converter oversamples a reception signal in synchronization with a base clock signal and generates an A/D converted data sequence. The waveform equalizer performs an arithmetic operation to equalize a waveform. The training sequence generator generates a data sequence for training. The data sequence for training is used instead of an output data of the detector so as to converge a coefficient used in the arithmetic operation in advance. The clock recovery circuit supplies the base clock signal without executing a clock recovery operation during a training period, and executes the clock recovery operation according to the output data of the detector. The matched filters receive the A/D converted data sequence, and execute a filter arithmetic operation.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: March 1, 2016
    Assignee: DENSO CORPORATION
    Inventors: Nobuaki Matsudaira, Hironobu Akita, Shigeki Ohtsuka
  • Publication number: 20160036606
    Abstract: A waveform equalization apparatus includes an A/D converter, a waveform equalizer, a training sequence generator, a clock recovery circuit, multiple matched filters, and a clock optimization logic. The A/D converter oversamples a reception signal in synchronization with a base clock signal and generates an A/D converted data sequence. The waveform equalizer performs an arithmetic operation to equalize a waveform. The training sequence generator generates a data sequence for training. The data sequence for training is used instead of an output data of the detector so as to converge a coefficient used in the arithmetic operation in advance. The clock recovery circuit supplies the base clock signal without executing a clock recovery operation during a training period, and executes the clock recovery operation according to the output data of the detector. The matched filters receive the A/D converted data sequence, and execute a filter arithmetic operation.
    Type: Application
    Filed: July 23, 2015
    Publication date: February 4, 2016
    Inventors: Nobuaki MATSUDAIRA, Hironobu AKITA, Shigeki OHTSUKA
  • Patent number: 9197459
    Abstract: In a decision feedback equalizer, at least one of weighting devices that has a tap coefficient an absolute value of which is relatively larger than absolute values of tap coefficients of other weighting devices is referred to as a main weighting device, and delay elements are disposed asymmetrically on signal processing paths or updating paths of the tap coefficients of the weighting devices in such a manner that an updating interval of the tap coefficient of the main weighting device is shorter than updating intervals of the tap coefficients of the other weighting devices.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: November 24, 2015
    Assignee: DENSO CORPORATION
    Inventors: Tetsuya Kusumoto, Shigeki Ohtsuka, Nobuaki Matsudaira, Hironobu Akita
  • Publication number: 20150333937
    Abstract: In a decision feedback equalizer, at least one of weighting devices that has a tap coefficient an absolute value of which is relatively larger than absolute values of tap coefficients of other weighting devices is referred to as a main weighting device, and delay elements are disposed asymmetrically on signal processing paths or updating paths of the to coefficients of the weighting devices in such a manner that an updating interval of the tap coefficient of the main weighting device is shorter than updating intervals of the tap coefficients of the other weighting devices.
    Type: Application
    Filed: May 13, 2015
    Publication date: November 19, 2015
    Inventors: Tetsuya KUSUMOTO, Shigeki OHTSUKA, Nobuaki MATSUDAIRA, Hironobu AKITA
  • Publication number: 20150244420
    Abstract: A communication system includes multiple communication nodes and a communication line. The multiple communication nodes include a master and multiple slaves. The communication line cascade-connects the communication nodes and supplies electricity. The communication line corresponds to a feeder line. Each of the communication nodes is connected with the communication line through an inductor to be supplied with electricity. The each of the communication nodes is AC coupled to the communication line to transmit and receive a communication signal. The master and the slaves perform a bidirectional communication. A communication slave is provided. The communication slave is connected with a communication line through an inductor to be supplied with electricity. A communication master is provided.
    Type: Application
    Filed: January 28, 2015
    Publication date: August 27, 2015
    Inventors: Nobuaki MATSUDAIRA, Shigeki OHTSUKA, Hironobu AKITA
  • Publication number: 20150220471
    Abstract: A communication system includes a communication wiring, at least one master node connected to the communication wiring, and at least one slave node connected to the communication wiring. The at least one master node and the at least one slave node are connected in a ring shape through the communication wiring and communicate in a start-stop synchronous communication.
    Type: Application
    Filed: January 27, 2015
    Publication date: August 6, 2015
    Inventors: Kenji INAZU, Shinichirou TAGUCHI, Hirofumi YAMAMOTO, Keita HAYAKAWA, Hironobu AKITA, Shigeki OHTSUKA, Nobuaki MATSUDAIRA, Takahisa YOSHIMOTO
  • Publication number: 20150222455
    Abstract: A communication system including multiple communication nodes is provided. Each of the multiple communication nodes includes a low speed communication transceiver that is directly connected to a differential communication channel, and a high speed communication transceiver that is AC coupled to the differential channel. The multiple communication nodes include a sending communication node. The sending communication node sends a command to switch from the low speed communication to a high speed communication when the sending communication node performs a low speed communication using the low speed communication transceiver. The sending communication node initiates the high speed communication using the high speed communication transceiver.
    Type: Application
    Filed: December 29, 2014
    Publication date: August 6, 2015
    Inventors: Shigeki OHTSUKA, Hironobu AKITA, Nobuaki MATSUDAIRA, Takahisa YOSHIMOTO
  • Publication number: 20150222418
    Abstract: In a reception circuit, in a first operating mode, the operation of at least a first charge pump circuit of a phase frequency comparator, the first charge pump circuit, samplers other than a specific sampler in samplers provided in a multi-phase sampler, and a data reproducing unit stops. In a second operating mode, the operation of at least a second charge pump circuit of a phase comparator and the second charge pump circuit stops.
    Type: Application
    Filed: September 12, 2013
    Publication date: August 6, 2015
    Inventors: Hironobu Akita, Shigeki Ohtsuka
  • Publication number: 20140177739
    Abstract: Nodes are connected in parallel between two transmission lines and configured to utilize a telecommunications standard of a differential transmission. At least one of the nodes includes two input/output terminals, a driver, a receiver, a resistor, and a comparator. The two input/output terminals are connected to the two transmission lines. The driver includes two output terminals connected to the two input/output terminals. The receiver includes two input terminals connected to the two input/output terminals. The resistor is connected between each of the two input/output terminals and one of a grand and a power supply voltage. The comparator compares a voltage between the transmission lines with a reference voltage to determine whether the transmission lines are in an idle state or in a communication state.
    Type: Application
    Filed: September 20, 2013
    Publication date: June 26, 2014
    Inventors: Nobuaki Matsudaira, Shigeki Ohtsuka, Hironobu Akita, Hirofumi Yamamoto
  • Patent number: D922323
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: June 15, 2021
    Assignee: TDK CORPORATION
    Inventors: Noritaka Chiyo, Toshio Tomonari, Shigeru Kaneko, Shigenori Hirata, Akihito Watanabe, Hirohumi Asou, Junpei Hayama, Shigeki Ohtsuka, Takahiro Ohishi, Takaaki Imai, Tomohiro Moriki, Takakazu Maruyama