Patents by Inventor Shigeo Iriguchi

Shigeo Iriguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11158964
    Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 26, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, Yoshiyuki Hiroshima, Kohei Choraku, Kazuki Takahashi, Akiko Matsui, Shigeo Iriguchi
  • Publication number: 20200303849
    Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, YOSHIYUKI HIROSHIMA, Kohei Choraku, Kazuki TAKAHASHI, AKIKO MATSUI, Shigeo Iriguchi
  • Patent number: 10714849
    Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: July 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, Yoshiyuki Hiroshima, Kohei Choraku, Kazuki Takahashi, Akiko Matsui, Shigeo Iriguchi
  • Patent number: 10624216
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: April 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Patent number: 10605851
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: March 31, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Patent number: 10393797
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: August 27, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Publication number: 20190245284
    Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 8, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, YOSHIYUKI HIROSHIMA, Kohei Choraku, Kazuki TAKAHASHI, AKIKO MATSUI, Shigeo Iriguchi
  • Patent number: 10342129
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: July 2, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20190110365
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 11, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Publication number: 20180310405
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Application
    Filed: April 5, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20180059170
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Application
    Filed: June 15, 2017
    Publication date: March 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Mitsunori ABE, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Publication number: 20170285096
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 5, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
  • Patent number: 9709619
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: July 18, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Publication number: 20170196077
    Abstract: A rigid flexible board includes: a substrate that has flexibility and electric insulation; a protective layer formed at a central portion of each of opposite surfaces of the substrate; and a plurality of core layers partially covering the protective layer and formed at a circumferential edge of each of the opposite surfaces of the substrate; wherein a gap is formed close to a center of the substrate in a thickness direction thereof between the core layers and the protective layer.
    Type: Application
    Filed: December 12, 2016
    Publication date: July 6, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo IRIGUCHI, Naoki Nakamura, Mitsunori Abe, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Patent number: 9591763
    Abstract: Disclosed substrate with embedded component includes: an insulating base member; a conductive pad formed on the insulating base member; a component connected to the conductive pad with a solder; and a resin covering the component, wherein a hole is provided in the insulating base member and the conductive pad, and the insulating base member is exposed on a side surface of the hole.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: March 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Kiyoyuki Hatanaka, Nobuo Taketomi, Shigeo Iriguchi, Ryo Kanai, Naoki Nakamura
  • Publication number: 20160324005
    Abstract: Disclosed substrate with embedded component includes: an insulating base member; a conductive pad formed on the insulating base member; a component connected to the conductive pad with a solder; and a resin covering the component, wherein a hole is provided in the insulating base member and the conductive pad, and the insulating base member is exposed on a side surface of the hole.
    Type: Application
    Filed: March 14, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Kiyoyuki Hatanaka, Nobuo Taketomi, Shigeo Iriguchi, Ryo Kanai, Naoki Nakamura
  • Publication number: 20140077834
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Application
    Filed: July 15, 2013
    Publication date: March 20, 2014
    Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
  • Patent number: 8456854
    Abstract: A repair system which prevents heating of weakly heat resistant devices together and causing deterioration of the quality when preheating a first surface of the circuit board, wherein an electromagnetic induction material is buried in advance inside the circuit board near a specific electronic device envisioned as needed repair when becoming a defective electronic device in a production process and an electromagnetic coil emitting electromagnetic waves to an electromagnetic induction member in the vicinity of the repair device is provided and the heat generated by the electromagnetic induction member due to the electromagnetic waves enables the repair device to be heated and detached from the circuit board.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: June 4, 2013
    Assignee: Fujitsu Limited
    Inventors: Shigeo Iriguchi, Kiyoyuki Hatanaka, Satoshi Watanabe, Nobuo Taketomi, Keiichi Yamamoto, Masaru Sugie
  • Publication number: 20110240355
    Abstract: A printed circuit board unit includes a printed circuit board and an electronic component. The electronic component is electrically connected to a predetermined position on the printed circuit board by means of soldering while being joined to the printed circuit board using an adhesive layer. The adhesive layer, disposed between the printed circuit board and the electronic component, partially includes a multilayer laminated region including a first reinforcement resin layer and a second reinforcement resin layer. The first reinforcement resin layer is disposed on a side of the printed circuit board, whereas the second reinforcement resin layer is disposed on a side of the electronic component. The second reinforcement resin layer has adhesive strength greater than that of the first reinforcement resin layer.
    Type: Application
    Filed: March 25, 2011
    Publication date: October 6, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Naoki NAKAMURA, Nobuo TAKETOMI, Kiyoyuki HATANAKA, Shigeo IRIGUCHI
  • Publication number: 20110240352
    Abstract: A printed circuit board includes a printed circuit board body and a resin layer. The printed circuit board body includes a plurality of mounting pads. The resin layer, containing a thermoplastic resin, is formed on the surface of the printed circuit board body. The resin layer includes a plurality of holes disposed to be aligned with the positions of the mounting pads on a one-to-one basis for exposing the mounting pads therethrough. In a method of fabricating the printed circuit board, the resin layer is formed atop the printed circuit board body.
    Type: Application
    Filed: March 25, 2011
    Publication date: October 6, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Naoki NAKAMURA, Nobuo TAKETOMI, Kiyoyuki HATANAKA, Shigeo IRIGUCHI