Abstract: A search system includes a database, a face recognition unit, a similarity degree processing unit, and a search result output unit. The database stores image data. The face recognition unit detects a face from the image data stored in the database. When a target image indicating a search target person and an auxiliary image group including auxiliary image that assists a search for the search target person are designated, the face recognition unit evaluates whether a face detected from the image data is included in the target image and the auxiliary image group. The similarity degree processing unit determines whether the search target person is captured in the image data by using the evaluated result. The search result output unit acquires, from the database, the image data determined that the search target person is captured based on the determined result, and outputs a search result including the acquired image data.

Abstract: A search system including: a database in which image data being a selection target is stored; a face recognition unit which detects a face from the image data being the selection target stored in the database, and evaluates, when a target image indicating a search target person and an auxiliary image group including auxiliary image that assists a search for the search target person are designated, whether a face detected from the image data being the selection target is included in the target image and the auxiliary image group; a similarity degree processing unit which determines whether the search target person is captured in the image data, by using the evaluated result, and a search result output unit which acquires, from the database, the image data determined that the search target person is captured, based on the determined result, and outputs a search result including the acquired image data.

Abstract: An information processing apparatus of the present invention includes first and second computer elements which execute the same instructions substantially simultaneously and which are substantially synchronized with each other. The first computer element includes first and second memory elements, which are written by the first and second computer elements, respectively, during a first state. The information processing apparatus has a control element which makes the first computer element read from the second memory element during a second state. Another information processing apparatus has the first and second computer elements, and first and second memory areas which are provided in the first computer element. The first and second memory areas are written by the first computer element and the second computer element, respectively, during a first state. A control element makes the first computer element read from the second memory area during a second state.

Abstract: A lock-step synchronism fault-tolerant computer system includes a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When disagreement in a state of access to an external bus among the respective processors in each computing module is detected, if no fault is detected in the system including the respective computing modules, an interruption is notified to all of said processors. Synchronization among each computing module is recovered by adjusting timing of a response to an access which each processor executes by an interruption.

Abstract: In a lock-step synchronism fault-tolerant computer system including a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When detecting disagreement in a state of access to an external bus among the respective processors in each computing module, if no fault is detected in the system including each computing module, processing of resuming operation in synchronization is executed with respect to each computing module after generating an interruption to all the processors to execute delay adjustment for making a state of instruction execution among computing modules be coincident.

Abstract: An information processing system capable of dynamic CPU replacement regardless of the function of OS, and a method and a program for controlling the same. The information processing system comprises an information processor and a service processor. The service processor instructs MMCs of all cell boards in a partition that includes a cell board to be removed and an MMC of a replacement cell board to be incorporated to copy data from a memory of the cell board to be removed to a memory of the replacement cell board. Besides, when receiving a write instruction during the copying operation, the MMCs write the same data written to the cell board subject to replacement also to the memory of the replacement cell board. After the copying operation has been finished, the operations of CPUs in the partition are forcefully suspended. Subsequently, the service processor instructs BIOS to copy inside information of the CPU in the cell board subject to replacement into the CPU in the replacement cell board.

Abstract: In a lock-step synchronism fault-tolerant computer system including a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When detecting disagreement in a state of access to an external bus among the respective processors in each computing module, if no fault is detected in the system including each computing module, processing of resuming operation in synchronization is executed with respect to each computing module after generating an interruption to all the processors to execute delay adjustment for making a state of instruction execution among computing modules be coincident.

Abstract: An information processing apparatus of the present invention includes first and second computer elements which execute the same instructions substantially simultaneously in substantial synchronism, and which have first and second memory elements, respectively. The information processing apparatus has a copy element which copies a part of the data stored in the second memory element to the first memory element and a third memory element which stores information to designate which part of the data stored in the second memory element is copied by the copy element when a monitor element finds that the first computer element is out of the synchronism. Each of the first and second computer elements further has a processor and a bus connected to the processor, in another information processing apparatus of the present invention, and the monitor element is further connected to the bus.

Abstract: An information processing apparatus of the present invention includes first and second computer elements which execute the same instructions substantially simultaneously and which are substantially synchronized with each other. The first computer element includes first and second memory elements, which are written by the first and second computer elements, respectively, during a first state. The information processing apparatus has a control element which makes the first computer element read from the second memory element during a second state. Another information processing apparatus has the first and second computer elements, and first and second memory areas which are provided in the first computer element. The first and second memory areas are written by the first computer element and the second computer element, respectively, during a first state. A control element makes the first computer element read from the second memory area during a second state.

Abstract: A lock-step synchronism fault-tolerant computer system includes a plurality of computing modules having a processor and a memory in which each computing module processes the same instruction string in synchronization with each other. When disagreement in a state of access to an external bus among the respective processors in each computing module is detected, if no fault is detected in the system including the respective computing modules, an interruption is notified to all of said processors. Synchronization among each computing module is recovered by adjusting timing of a response to an access which each processor executes by an interruption.

Abstract: An information processing system capable of dynamic CPU replacement regardless of the function of OS, and a method and a program for controlling the same. The information processing system comprises an information processor and a service processor. The service processor instructs MMCs of all cell boards in a partition that includes a cell board to be removed and an MMC of a replacement cell board to be incorporated to copy data from a memory of the cell board to be removed to a memory of the replacement cell board. Besides, when receiving a write instruction during the copying operation, the MMCs write the same data written to the cell board subject to replacement also to the memory of the replacement cell board. After the copying operation has been finished, the operations of CPUs in the partition are forcefully suspended. Subsequently, the service processor instructs BIOS to copy inside information of the CPU in the cell board subject to replacement into the CPU in the replacement cell board.

Abstract: There is provided a fiber channel fabric for interchanging frame by dividing a connectionless, variable length frame into fixed length cells without carrying out calling setup and/or releasing command between termination nodes, to thereby interchange cells, and further by reconstructing the thus interchanged cells into an original frame, the fiber channel fabric including (a) a fiber channel interface controller for communicating with a termination node or another fiber channel fabric to control a fiber channel in protocol, (b) an input data buffer for temporarily storing a frame received the termination node or the another fiber channel fabric, (c) a cell producer for dividing the frame received into fixed length cells, (d) a cell switch for interchanging data at the unit of a fixed length cell, (e) a frame constructor for reconstructing an original frame of the fixed length cells transmitted from the cell switch, (f) an output data buffer for temporarily storing a frame transmitted from the frame constructo

Abstract: A signal processor which is capable of amplifying, at a predetermined amplification factor, only AC components of input signals Vin received from a pyroelectric infrared sensor or sensors. The signal processor essentially includes a low-pass filter circuit (11) for passing on only a DC component of an input signal (Vin) received from a pyroelectric infrared sensor (1), and a differential amplifier circuit (21) arranged to amplify only an AC component of the input signal (Vin) on the basis of a DC signal (VDC) passed through the low-pass filter circuit (11) and the input signal (Vin) received from the pyroelectric infrared sensor(1). Along with the input signal (Vin) from the pyroelectric infrared sensor, the differential amplifier circuit (21) is supplied with the DC signal (VDC) which is a DC component of the input signal (Vin) which has been passed through the low-pass filter circuit.

Abstract: A precision cutting process machine aligns a workpiece to be subjected to a precision cutting process by a continuously rotating cutting tool relative to the cutting tool, and cuts the work into a predetermined pattern so as to form fine grooves at a predetermined pitch by a continuous cutting processes. The machine includes a main body base portion and an up-and-down moving table driven in the up-and-down direction with respect to the main body base portion.

Abstract: In a magnetic disk processing apparatus, read command processing instructs reading data out to compare a physical address (PA) of data which has been read out with a PA being retained. If the addresses coincide with each other, then processing returns to a command executing operation and, if not, after a flag condition is ascertained by a flag determining operation, a seek command is issued for a PA being stored independently of the software. A flag indicates that a seek command, resulting from a mismatch of a comparison, has been completed and the processing returns to read command processing. In this manner, any seek error caused by a mismatch of seek address management which occurs between a seek command from software and a patrol seek is compensated for.

Abstract: A liquidometer composed of a siphon for emitting a sample liquid stored in a reservoir and a liquid level sensor for sensing the level of the sample remained in the reservoir. The siphon further includes a pair of sensors for counting the number of emission thereof, while the liquid level sensor includes two rows of resistive film with a plurality of sensing elements embedded therein. Outside the liquidometer, there are provided a counter connected to the emission sensor, a level calculator connected to the liquid level sensor, and a calculator coupled to both. A gross amount of the sample liquid having been measured for a period of hours is obtained by adding together a count signal from the counter which represents the quantity of the sample liquid fully stored in the reservoir and a signal from the level counter which represents the liquid level of the remaining sample liquid.

Abstract: A body fluid excretion volume measurement apparatus for medical application. The apparatus stores body fluid excreted from patients in a body fluid storage tank and measures the resistance value with a resistance sensor. The resistance value depends on the shape of the body fluid storage tank, and if the tank is columnar, the resistance value is monotonically increasing with respect to the depth of body fluid. The output of the resistance sensor is processed by a measurement part and electric measurement of the body fluid volume stored in the body fluid storage tank is performed automatically.

Abstract: A liquid level sensor for detecting a level of an electrolyte where: a pair of resistance films are formed on an insulating substrate: a plurality of electrodes are intermittently mounted on the resistance films in the longitudinal direction; the resistance films are soaked in the electrolyte in the vertical direction along the longitudinal direction; the liquid surface is detected from the variation of the resistance value of the resistance films caused by the short-circuiting of pairs of the electrodes in the electrolyte. The exposed surface of the resistance film is covered by a moisture-resistance film. The result is that undesirable change of resistance value of the resistance film caused by being moistened can be reliably prevented.

Abstract: This invention relates to a polyolefin composition with an improved weather resistance, which comprises a polyolefin blended with (1) a benzotriazole compound, (2) a heterocyclic hindered amine compound and (3) a phenyl benzoate compound or nickel complex compound.

Abstract: There is disclosed a tool for stripping the insulating covering from a covered electrical wire which comprises one handle pivoted by means of a shaft to the other handle having a lower jaw at the leading end portion thereof and in which the leading portion of the main body of the tool has an electrical wire holding mechanism adapted to grip the wire upon closing of the two handles and cutting blades adapted to cut into and pull the cut insulator covering off of the core of the wire in the longitudinal direction of the handles upon the closing of the handles. The electrical wire holding mechanism and cutting blades project laterally of the handles.