Abstract: To minimize a size of a semiconductor device and reduce a thickness thereof as well as improve the yield and lower the production cost in the production of a semiconductor package, a multi-layered semiconductor device is provided, wherein a film-like semiconductor package (10) incorporating therein a semiconductor chip (12) is disposed in a package accommodation opening (11a) of a circuit pattern layer to form a circuit board. A plurality of such circuit boards are layered together to electrically connect circuit patterns (13) of the circuit boards with each other via a low melting point metal (14) or lead beam bonding (13b).

Abstract: A piezoelectric ceramic composition comprises a composite perovskite type oxide of Pb(Ni1/3Nb2/3)O3 and simple perovskite type oxides of PbTiO3 and PbZrO3 as main components. The composition range of the main components exists in an area surrounded by lines for connecting respective composition points, i.e., a point A (X=40, Y=37, Z=23), a point B (X=36, Y=37, Z=27), a point C (X=33, Y=40, Z=27), and a point D (X=37, Y=40, Z=23) in a triangular coordinate system defined by apexes of Pb(Ni1/3Nb2/3)O3, PbTiO3, and PbZrO3, provided that Pb(Ni1/3Nb2/3)O3 amounts to X molar %, PbTiO3 amounts to Y molar %, and PbZrO3 amounts to Z molar %. The composition makes it possible to realize a large strain amount while suppressing the relative dielectric constant to be low. The composition is preferably usable for an piezoelectric actuator of an ink-jet head.

Abstract: A magnetic multilayer film deposition system having a plurality of treatment chambers for depositing a multilayer film including a plurality of magnetic films on a substrate, a conveyance system for conveying the substrate in a state shielded from the atmosphere, a metal film treatment chamber, a treatment system having treating metal film included in the multilayer film in the treatment chamber, an optical measurement system for optically evaluating the surface state of the metal film, and a control system for controlling the operation of the treatment system based on a measurement signal output from this optical measurement system, wherein when depositing a multilayer film on a substrate in the film deposition system, it is possible to manage the surface state of the metal film during the treatment process of the metal film and possible to treat the metal film precisely.

Abstract: Thin semiconductor device, especially a thin package, which reduces and achieves uniform mounting height, not requiring mounting of individual chips, improves manufacturing yield, without being affected by variation in chip thickness, enables testing alltogether, and process for producing same, the semiconductor mounted with back surface exposed upward, on top of an insulating substrate having throughholes in thickness direction, the area around semiconductor side surfaces being sealed by a resin layer, metal interconnections on the bottom surface of the substrate define bottom portions of throughholes of the substrate, a solder resist layer having throughholes in the thickness direction covers the bottom surface of metal interconnections and substrate, terminals extending downward from the active surface of the semiconductor are inserted into throughholes of the substrate, conductive filler fills gaps between the terminals and the throughholes of the substrate, and connection terminal and interconnections ar

Abstract: A piezoelectric ceramic composition comprises a composite perovskite type oxide of Pb(Ni1/3Nb2/3)O3 and simple perovskite type oxides of PbTio3 and PbZrO3 as main components. The composition range of the main components exists in an area surrounded by lines for connecting respective composition points, i.e., a point A (X=40, Y=37, Z=23), a point B (X=36, Y=37, Z=27), a point C (X=33, Y=40, Z=27), and a point D (X=37, Y=40, Z=23) in a triangular coordinate system defined by apexes of Pb(Ni1/3Nb2/3)O3, PbTiO3, and PbZrO3, provided that Pb(Ni1/3Nb2/3)O3 amounts to X molar %, PbTiO3 amounts to Y molar %, and PbZrO3 amounts to Z molar %. The composition makes it possible to realize a large strain amount while suppressing the relative dielectric constant to be low. The composition is preferably usable for an piezoelectric actuator of an ink-jet head.

Abstract: An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.

Abstract: The present invention is to provide a CVD apparatus having a high productivity, involving less contamination on the back surface of a substrate and having a high yield. A CVD apparatus for forming a thin film is characterized in that the interior of the vessel is divided into a upper portion and a lower portion (transfer chamber) by a support member for holding the ring chuck and the upper portion is further divide by inner wall into a deposition chamber and an exhaust chamber in axial symmetry around the same central axis. The deposition chamber communicated to the exhaust chamber through a gap between the inner wall and the ring chuck and/or holes provided in the inner wall. The transfer chamber is communicated to the deposition chamber or exhaust chamber through a gap formed between the ring chuck and the support member.

Abstract: A multi-layer wiring substrate comprises: a plurality of wiring substrates, each of the substrates comprising a plate or sheet-like insulating layer and a wiring layer formed on only one of surfaces of the insulating layer; the plurality of wiring substrates being laminated in such a manner that the insulating layer and wiring layer are alternately arranged; at least a pair of said wiring layers arranged on respective surfaces of the insulating layer being electrically connected with each other by means of connecting portions formed so as to pass through the insulating layer; and the connecting portion comprises a part of the wiring layer which is extended into a region of an opening formed so as to pass through said insulating layer and a low-melting point metal disposed in the opening and electrically connecting the part of the wiring layer with a wiring substrate formed on an adjacent insulating layer of the laminated structure.

Abstract: A wiring board and electrode of a semiconductor element are connected with each other by the method of wire bonding, and problems arising from the thermal stress generated in the process of mounting are overcome. There is provided a wiring board comprising: a first face joined to an electrode forming face of a semiconductor element 10; and a second face on the opposite side of the first face, a wiring pattern 16 being formed on the second face, a land 24 joined to an external connecting terminal 22 being formed at one end of the wiring pattern, a wire bonding section 16a connected with a bonding wire 40 being formed at the other end of the wiring pattern, wherein the land 24 is supported by a buffer layer 34 for reducing the thermal stress generated when the semiconductor element, to which the wiring board is attached, is mounted via the external connecting terminals, and the wire bonding section 16a is supported by a bonding support layer 36 having an elastic modulus capable of allowing wire bonding.

Abstract: The present invention provides a multilayer circuit board for mounting thereon a semiconductor chip or other electronic elements having electrode terminals or other connection terminals which are arranged in a grid, staggered, or close-packed manner in an improved form to enable reduction in the number of the wiring layers for lead wiring lines, thereby facilitating the production of multilayer circuit boards and providing an improved product reliability.

Abstract: A thin film is fabricated while causing ions in a plasma P to be incident by effecting biasing relative to the space potential of the plasma P by imparting a set potential to the surface of a substrate 9. A bias system 6 causes the substrate surface potential Vs to vary in pulse form by imposing an electrode imposed voltage Ve in pulse form on a bias electrode 23 which is in a dielectric block 22. The pulse frequency is lower than the oscillation frequency of ions in the plasma P, and the pulse period T, pulse width t and pulse height h are controlled by a control section 62 in a manner such that the incidence of ions is optimized. The imposed pulses are controlled in a manner such that the substrate surface potential Vs recovers to a floating potential Vf at the end of a pulse period T, and that the ion incidence energy temporarily crosses a thin film sputtering threshold value in a pulse period T.

Abstract: A multi-layer wiring substrate comprises: a plurality of wiring substrates, each of the substrates comprising a plate or sheet-like insulating layer and a wiring layer formed on only one of surfaces of the insulating layer; the plurality of wiring substrates being laminated in such a manner that the insulating layer and wiring layer are alternately arranged; at least a pair of said wiring layers arranged on respective surfaces of the insulating layer being electrically connected with each other by means of connecting portions formed so as to pass through the insulating layer; and the connecting portion comprises a part of the wiring layer which is extended into a region of an opening formed so as to pass through said insulating layer and a low-melting point metal disposed in the opening and electrically connecting the part of the wiring layer with a wiring substrate formed on an adjacent insulating layer of the laminated structure.

Abstract: To minimize a size of a semiconductor device and reduce a thickness thereof as well as improve the yield and lower the production cost in the production of a semiconductor package, a multi-layered semiconductor device is provided, wherein a film-like semiconductor package (10) incorporating therein a semiconductor chip (12) is disposed in a package accommodation opening (11a) of a circuit pattern layer to form a circuit board. A plurality of such circuit boards are layered together to electrically connect circuit patterns (13) of the circuit boards with each other via a low melting point metal (14) or lead beam bonding (13b).

Abstract: The present invention is to provide a CVD apparatus having a high productivity, involving less contamination on the back surface of a substrate and having a high yield.

Abstract: A semiconductor device, in particular a thin semiconductor package, which reduces and simultaneously achieves a uniform mounting height, does not require complicated steps for mounting individual chips, improves the manufacturing yield, achieves a uniform height of the semiconductor device without being affected by the variation in thickness of the chip, and enables execution of an electrical test all together, and a process for production of the same, wherein a semiconductor is mounted, with its back surface exposed upward, on the top surface of an insulating tape substrate having through holes in the thickness direction, the area around the side surfaces of the semiconductor element is sealed by a sealing resin layer, metal interconnections formed on the bottom surface of the tape substrate define the bottom portions of the through holes of the tape substrate, a solder resist layer having through holes in the thickness direction covers the bottom surface of the metal interconnections and the tape substrate,

Abstract: A thin film is fabricated while causing ions in a plasma P to be incident by effecting biasing relative to the space potential of the plasma P by imparting a set potential to the surface of a substrate 9. A bias system 6 causes the substrate surface potential Vs to vary in pulse form by imposing an electrode imposed voltage Ve in pulse form on a bias electrode 23 which is in a dielectric block 22. The pulse frequency is lower than the oscillation frequency of ions in the plasma P, and the pulse period T, pulse width t and pulse height h are controlled by a control section 62 in a manner such that the incidence of ions is optimized. The imposed pulses are controlled in a manner such that the substrate surface potential Vs recovers to a floating potential Vf at the end of a pulse period T, and that the ion incidence energy temporarily crosses a thin film sputtering threshold value in a pulse period T.

Abstract: A plasma processing apparatus includes a cathode 54 having a large diameter part 56 and a long thin small diameter part 58, and the upper end surface of the large diameter part 56 faces the plasma forming space 76. The substrate 66 which is to be processed is mounted on the upper end surface of the large diameter part 56. The lower end of the small diameter part 58 is connected via the matching circuit 60 to the high frequency power source 62. The transmission path within the chamber comprises a large diameter coaxial line, a small diameter coaxial line and a radial line which connects them. The large diameter coaxial line includes the large diameter part 56, the first side wall 42 and the insulator 70. The radial line includes the lower surface of the large diameter part 56, the upper surface of the bottom plate 46 and the gap 72 between them. The small diameter coaxial line includes the small diameter part 58, the second side wall 68 and the gap 74.

Abstract: The present invention provides a substrate processing apparatus having improved temperature distribution on a block heater and improved productivity. The substrate processing apparatus includes a reactor having an exhaust unit to form a vacuum environment therein for processing a surface of a substrate, a support member provided in the reactor, and gas introduction units for introducing reactive gases into the reactor, the substrate support member including a block heater. The block heater has upper, intermediate and lower members, which are placed one over another, the faying surfaces of the respective members being joined by diffusion bonding. A heating member is provided between the intermediate and lower members, and purge gas passages are formed between the intermediate and upper members.

Abstract: A deposition apparatus has a reactor 11 which is furnished with a reaction gas delivery part 13 and a substrate holder 12 in which reaction gas is delivered from the reaction gas delivery part to a substrate 23 on the substrate holder, and a thin film is deposited on the substrate by means of a chemical reaction which results from supplying HF power to the reaction gas delivery part. Plasma is generated and excites the reaction gas. The gas delivery parts 27, 29, 30, 31 produce a flow of purge gas in the dead space surrounding the reaction gas deliver part. Reaction gas which is liable to be retained in the dead space is driven out by the flow of this gas, and circulation and retention of reaction gas are prevented.

Abstract: A deposition apparatus has a reactor 11 which is furnished with a reaction gas delivery part 13 and a substrate holder 12 in which reaction gas is delivered from the reaction gas delivery part to a substrate 23 on the substrate holder, and a thin film is deposited on the substrate by means of a chemical reaction which results from supplying HF power to the reaction gas delivery part. Plasma is generated and excites the reaction gas. The gas delivery parts 27, 29, 30, 31 produce a flow of purge gas in the dead space surrounding the reaction gas deliver part. Reaction gas which is liable to be retained in the dead space is driven out by the flow of this gas, and circulation and retention of reaction gas are prevented.