Patents by Inventor Shigeyuki Maruyama

Shigeyuki Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8766659
    Abstract: A contactor includes a contactor base material including a first material and a conductor film including a second material. The conductor film is formed only on a contact surface with an electrode of a semiconductor apparatus at a tip of the contactor film.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: July 1, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shigeyuki Maruyama, Yoshihiro Sekizawa, Tomohiro Suzuka
  • Patent number: 8759119
    Abstract: A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: June 24, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shigeyuki Maruyama, Yasuyuki Itoh, Tetsurou Honda, Kazuhiro Tashiro, Makoto Haseyama, Kenichi Nagashige, Yoshiyuki Yoneda, Hirohisa Matsuki
  • Patent number: 8671557
    Abstract: A tray is provided in combination with an electronic component attaching tool attached to the tray and includes an attachment depression part that includes an inner wall and to which an electronic component is attached, wherein forming of the inner wall of the attachment depression part does not substantially depend on an external shape of the electronic component, and a standard part formed in the inner wall of the attachment depression part and engaging with a first structure part of the electronic component attaching tool to align a position of the electronic component attaching tool to the standard part when a position of the electronic component is aligned to a first position of the tray using the electronic component attaching tool, the standard part having a shape which does not substantially depend on the external shape of the electronic component.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Daisuke Koizumi, Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe
  • Patent number: 8404496
    Abstract: A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shigeyuki Maruyama, Yasuyuki Itoh, Tetsurou Honda, Kazuhiro Tashiro, Makoto Haseyama, Kenichi Nagashige, Yoshiyuki Yoneda, Hirohisa Matsuki
  • Patent number: 8268670
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 8164181
    Abstract: A semiconductor device packaging structure is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 24, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Publication number: 20120005883
    Abstract: An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Daisuke Koizumi, Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe
  • Publication number: 20120005875
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 8051554
    Abstract: An IC socket in which an electronic component is attached to a predetermined position of the IC socket, the IC socket including a fixed part including a contact pin which is connected to a terminal of the electronic component when a position of the electronic component is aligned to the predetermined position of the IC socket using an electronic component attaching tool, the contact pin including a pair of end portions on an upper surface of the fixed part; a movable part that is movable to the fixed part when the movable part is pushed down to apply a force to the contact pin of the fixed part so as to separate the pair of end portions of the contact pin from each other; and a standard part that is formed on the movable part and engages with the electronic component attaching tool to align a position of the electronic component attaching tool to the standard part when a position of the electronic component is aligned to the predetermined position of the IC socket using the electronic attaching tool, the stan
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: November 8, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Daisuke Koizumi, Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe
  • Publication number: 20110212551
    Abstract: A contactor includes a contactor base material including a first material and a conductor film including a second material. The conductor film is formed only on a contact surface with an electrode of a semiconductor apparatus at a tip of the contactor film.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 1, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Shigeyuki MARUYAMA, Yoshihiro Sekizawa, Tomohiro Suzuka
  • Patent number: 7921906
    Abstract: In a temperature control method, a controlled part is arranged to contact a first principal surface of a heat conduction part. The heat conduction part has the first principal surface and a second principal surface opposite to the first principal surface. The first principal surface has a configuration corresponding to a configuration of the controlled part. The second principal surface is larger in surface area than the first principal surface. At least one of a heating unit and a cooling unit is driven to set the controlled part at a predetermined temperature. The heating unit and the cooling unit are disposed on the second principal surface of the heat conduction part so that the heating unit and the cooling unit are arranged side by side.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: April 12, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shigeyuki Maruyama, Hiroshi Misawa, Naohito Kohashi
  • Publication number: 20110049699
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 3, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 7807481
    Abstract: A method for protecting a semiconductor device is disclosed that can improve reliability of a performance test for the semiconductor device and prevent damage to the semiconductor device during transportation or packaging for shipment. An IC cover is attached to the semiconductor device, which has height unevenness because it includes semiconductor chips and electric parts having different heights. The IC cover includes projecting portions and a base portion. After being attached to the semiconductor device, the projecting portions stand in a free area in the semiconductor device, and the base portion is supported by the projections to be separated from the semiconductor chips and electric parts in the semiconductor device. The IC cover is detachably attached to the semiconductor device.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: October 5, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kazuhiro Tashiro, Keisuke Fukuda, Naohito Kohashi, Shigeyuki Maruyama
  • Patent number: 7795552
    Abstract: In a contactor contact piece members can be arranged at a fine pitch, and a contact can be made surely by a small contact pressure. The contact piece members electrically connect an electronic part to an external circuit. The contact piece member is formed of an electrically conductive material in a generally spherical shape. A molecular density of a central part of the contact piece member is lower than a molecular density of a part near a surface. The electrically conductive material may include at least one of an electrically conductive fine particle, an electrically conductive fiber and an electrically conductive filler.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: September 14, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shigeyuki Maruyama, Toru Nishino
  • Patent number: 7642551
    Abstract: A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: January 5, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Shigeyuki Maruyama
  • Patent number: 7518388
    Abstract: A contactor configured to be electrically connected to the terminals of an electronic component is disclosed. The connector includes multiple contact electrodes contacting the terminals of the electronic component and multiple elastic electrodes each composed of an electrically conductive elastic body. The elastic electrodes generate a pressing force for pressing the contact electrodes against the terminals of the electronic component. The contact electrodes are separable from the elastic electrodes.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: April 14, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Kazuhiro Tashiro, Shigeyuki Maruyama, Daisuke Koizumi, Takumi Kumatabara, Keisuke Fukuda
  • Patent number: 7471096
    Abstract: A contactor for electronic parts can provide an appropriate and uniform contact with respect to a plurality of electrode terminals in an electronic part such as an IC. Each of a plurality of contact members has a first contact portion on one end thereof and a second contact portion on the other end thereof, the first contract portion having a recessed portion that receives one of the electrode terminals of the electronic part. A base accommodates and supports the plurality of the contact members. The first contact portion is movable in a horizontal direction.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: December 30, 2008
    Assignee: Fujitsu Limited
    Inventors: Naohito Kohashi, Shigeyuki Maruyama, Yoshikazu Arisaka, Hiroyuki Murotani, Katsuhiko Ono
  • Publication number: 20080299790
    Abstract: An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.
    Type: Application
    Filed: April 16, 2008
    Publication date: December 4, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Daisuke KOIZUMI, Shigeyuki MARUYAMA, Kazuhiro TASHIRO, Naoyuki WATANABE
  • Publication number: 20080251788
    Abstract: A wafer-level package includes a semiconductor wafer having at least one semiconductor chip circuit forming region each including a semiconductor chip circuit each provided with test chip terminals and non test chip terminals, at least one external connection terminal, at least one redistribution trace provided on the semiconductor wafer, at least one testing member, and an insulating material. A first end of the redistribution trace is connected to one of the test chip terminals and a second end of said redistribution trace is extended out to a position offset from the chip terminals. The testing member is provided in an outer region of the semiconductor chip circuit forming region, and the second end of the redistribution trace is connected to the testing member.
    Type: Application
    Filed: June 10, 2008
    Publication date: October 16, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Shigeyuki Maruyama
  • Patent number: 7430798
    Abstract: An electronic component attaching tool suitable for an external shape of a semiconductor device is prepared. The electronic component attaching tool has a function of aligning a position of the semiconductor device to an IC socket. The electronic component attaching tool is mounted on the standard surface that is formed on the IC socket substantially regardless of the external shape of the semiconductor device. The semiconductor device is then aligned and attached to the IC socket by using the electronic component attaching tool, and the electronic component attaching tool is removed from the IC socket. Another electronic component attaching tool suitable for an external shape of another semiconductor device is prepared, and the same procedure as the above is performed to align and attach this semiconductor device to the same type IC socket.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: October 7, 2008
    Assignee: Fujitsu Limited
    Inventors: Daisuke Koizumi, Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe