Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: A semiconductor chip which is to be overlapped with and joined to a surface of another solid device. The semiconductor chip has a surface protective film for covering internal wiring, an external connection pad which is formed by partially exposing the internal wiring from the surface protective film, and a wire connecting portion which is formed using a metal material having oxidation resistance on the external connection pad and to which a wire for electrical connection to an external terminal is connected. It is preferable that the semiconductor chip further has an internal connection pad used for connection to the solid device and a bump formed on the pad.

Abstract: A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

Abstract: A semiconductor chip which is to be overlapped with and joined to a surface of another solid device. The semiconductor chip has a surface protective film for covering internal wiring, an external connection pad which is formed by partially exposing the internal wiring from the surface protective film, and a wire connecting portion which is formed using a metal material having oxidation resistance on the external connection pad and to which a wire for electrical connection to an external terminal is connected. It is preferable that the semiconductor chip further has an internal connection pad used for connection to the solid device and a bump formed on the pad.

Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

Abstract: In the case where a plurality of second semiconductor chips (2a and 2b) are bonded to the surface side of a first semiconductor chip (1) via bump electrodes (11 and 21), an interconnection (9) for directly connecting electrode terminals (22a and 22b) of the two second semiconductor chips (2a and 2b) is formed on the surface of a passivation film (17) of the first semiconductor chip (1). As a result, a semiconductor device of a COC type in which a plurality of second semiconductor chips are mounted, while obtaining generalization of the first semiconductor chip, a signal can be transmitted/received between the second semiconductor chips without changing the design of the semiconductor device in the first semiconductor chip and a method for manufacturing the semiconductor device can be provided.

Abstract: An IC-card module (A) to be incorporated in an IC-card (B) includes a substrate (1), an IC chip (2) mounted on the substrate, and a protective member (4) bonded to the substrate (1) to cover the IC chip (2). A clearance (S) is provided between the protective member (4) and the IC chip (2) for avoiding direct contact of the protective member (4) with the IC chip (2). The clearance (S) is loaded with a filler (6) having a low modulus of elasticity, as required. The protective member (4) includes a reinforcing member (8).

Abstract: A method of opposing and joining a surface of a solid device and a surf ace of a semiconductor chip. A metal electrode portion formed in a raised state on the surface of the solid device and a metal electrode portion formed in a raised state on the surface of the semiconductor chip are directly abutted and pressed against each other. In the state, ultrasonic vibration is transmitted to the metal electrode portions which are pressed against each other, to join the metal electrode portions to each other.

Abstract: A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip may further include wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.

Abstract: A method of opposing and joining a surface of a solid device and a surface of a semiconductor chip. A metal electrode portion formed in a raised state on the surface of the solid device and a metal electrode portion formed in a raised state on the surface of the semiconductor chip are directly abutted and pressed against each other. In the state, ultrasonic vibration is transmitted to the metal electrode portions which are pressed against each other, to join the metal electrode portions to each other.

Abstract: A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip further includes wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.

Abstract: A semiconductor device having a semiconductor chip bonded to the surface of a solid body (another semiconductor chip or wiring board). A hollow enclosed space surrounding a connection member is formed between the solid body surface and the surface of the semiconductor chip opposite thereto. The enclosed space may be formed by a surrounding wall disposed around the circumference of the semiconductor chip. The enclosed space may alternatively be formed by an encapsulating resin for packaging.

Abstract: In the case where a plurality of second semiconductor chips (2a and 2b) are bonded to the surface side of a first semiconductor chip (1) via bump electrodes (11 and 21), an interconnection (9) for directly connecting electrode terminals (22a and 22b) of the two second semiconductor chips (2a and 2b) is formed on the surface of a passivation film (17) of the first semiconductor chip (1). As a result, a semiconductor device of a COC type in which a plurality of second semiconductor chips are mounted, while obtaining generalization of the first semiconductor chip, a signal can be transmitted/received between the second semiconductor chips without changing the design of the semiconductor device in the first semiconductor chip and a method for manufacturing the semiconductor device can be provided.

Abstract: In the method of manufacturing an IC module (1) including a resin packaging process using upper and lower dies (5) for forming a cavity (50) while the dies are clamped, the resin packaging process is carried out by introducing a melted resin while a substrate (2) on which an IC chip (3) is placed and a coil (20A) which has a doughnut shape when observed from above and is flattened as a whole are housed in the cavity (50). When a substrate (2) on which an antenna coil (20) is patterned is to be packaged with a resin, the resin packaging process is carried out by forming a spacer (28) having an equal and almost equal height to the height of the cavity (50) on the substrate (2), housing it in the cavity (50), and introducing a melted resin. Instead of forming the spacer (28) on the substrate (2), a substrate (2) housed in a cavity (50) may be sucked. The manufacturing method can provide good protection of an IC chip and an antenna coil.

Abstract: A manufacturing method includes the steps of integrally fabricating a plurality of circuit elements (41) on a substrate (1a), forming electrode bumps (11) on electrode pads (11b) conducting with circuit elements (41), forming a scribe line or a scribe line mark (21a) at a prescribed position of substrate (1a), and sticking an anisotropically conductive film (30) to cover each of the electrode bumps (11) and the scribe line or the scribe line mark (21a). The step of forming the electrode bumps (11) and the step of forming the scribe line or the scribe line mark (21a) are performed simultaneously. The electrode bumps (11) and the scribe line or the scribe line mark (21a) are preferably formed of gold. By the manufacturing method, even when an anisotropically conductive film is stuck on a semiconductor wafer having a plurality of circuit elements formed, the circuit elements can be diced as desired.

Abstract: A semiconductor device comprising a film substrate and a semiconductor chip bonded to an upper surface of the film substrate is provided. The semiconductor chip has a main surface formed with a plurality of terminal pads. The film substrate has a lower surface formed with a plurality of external terminal portions in a matrix pattern, and an upper surface formed with a plurality of wiring patterns for respectively connecting with the external terminal portions. The wiring patterns formed in the upper surface of the film substrate are respectively connected to the terminal pads formed on the main surface of the semiconductor chip.

Abstract: An IC module incorporated in an IC-card includes a substrate, an IC chip mounted on the substrate, and an antenna coil electrically connected to the IC chip. The antenna coil includes a conductive film which is patterned on a surface of the substrate, thereby facilitating fabrication of the IC module while realizing a thickness reduction of the IC module.

Abstract: There is provided a high-speed heterojunction transistor which is excellent in heat and radiation resistances with its emitter injection efficiency improved due to heterojunction. A .beta. silicon carbide layer (44) acting as base region is grown on an .alpha. silicon carbide substrate (42) acting as emitter region. Due to the difference in forbidden band between the .alpha. silicon carbide substrate (42) and the .beta. silicon carbide layer (44), heterojunction can be obtained. Because the .alpha. silicon carbide substrate (42) has a wider forbidden band, emitter efficiency is improved, allowing a high-speed transistor to be realized. Further, the device is made of silicon carbide, it is excellent in heat and radiation resistances. This invention may be used in an embodiment in which a heterojunction bipolar transistor or a heterojunction IIL is manufactured.

Abstract: In a semiconductor device having I.sup.2 L gate, on a first conducting type semiconductor layer, a first semiconductor region with a second conducting type and a wider band gap than that of the semiconductor layer and a second semiconductor region with a second conducting type and a narrower band gap than that of the semiconductor layer are formed, and on the second semiconductor region, a third semiconductor region with the first conducting type is formed.