Patents by Inventor Shih-Han Chen

Shih-Han Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10969567
    Abstract: An optical imaging lens includes first, second, third, fourth, fifth, and sixth lens elements, each having an object-side surface facing toward an object side and an image-side surface facing toward an image side. The image-side surface of the first lens element includes a concave portion in a vicinity of the optical axis and a concave portion in a vicinity of a periphery of the first lens element. The image-side surface of the second lens element includes a convex portion in a vicinity of the optical axis. The image-side surface of the third lens element includes a concave portion in a vicinity of a periphery of the third lens element. The object-side surface of the fourth lens element includes a concave portion in a vicinity of the optical axis. The optical imaging lens as a whole has only the six lens elements having refractive power.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: April 6, 2021
    Assignee: Genius Electronic Optical Co., Ltd.
    Inventors: Shih Han Chen, Hung Chien Hsieh, Long Ye
  • Patent number: 10960006
    Abstract: A topical formulation comprising (a) a therapeutically effective amount of tofacitinib; (b) at least one solvent; and (c) optionally one or more other pharmaceutically acceptable excipients is provided. Also provided is a method for treating and/or preventing autoimmune diseases in a subject administering said topical formulation.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: March 30, 2021
    Assignee: TWi Pharmaceuticals, Inc.
    Inventors: Chih-Ming Chen, Guang-Wei Lu, Ling-Ying Liaw, Fan-Lun Liu, Shih-Fen Liao, Chou-Hsiung Chen, Yu-Han Kao, Yu-Yin Chen
  • Publication number: 20210072513
    Abstract: An optical imaging lens comprises first, second, third, fourth, fifth and sixth lens elements arranged sequentially from an object side to an image side along an optical axis. The object-side surface of the second lens element has a concave portion in the vicinity of a periphery of the second lens element, and the image-side surface of the second lens element has a concave portion in a vicinity of the optical axis. The image-side surface of the third lens element has a concave portion in the vicinity of a periphery of the third lens element. An effective focal length of the optical imaging lens is EFL, an air gap between the fourth lens element and the fifth lens element along the optical axis is G45, a central thickness of the sixth lens element along the optical axis is represented by T6, and EFL, G45 and T6 satisfy the equation: EFL/(G45+T6)?6.40.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 11, 2021
    Applicant: Genius Electronic Optical Co., Ltd.
    Inventors: Shih-Han Chen, Hung Chien Hsieh, Jia-Sin Jhang
  • Patent number: 10942340
    Abstract: An imaging lens includes first to sixth lens elements arranged from an object side to an image side in order from an object side to an image side along an optical axis of the imaging lens. Through designs of surfaces of the lens elements and relevant optical parameters, a short system length of the imaging lens may be achieved while maintaining good optical performance.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 9, 2021
    Assignee: Genius Electronic Optical Co., Ltd.
    Inventors: Shih-Han Chen, Jia-Sin Jhang, Guan-Ning Huang
  • Publication number: 20210057551
    Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Inventors: Po-Chang Lin, Bo-Han Huang, Chih-Chung Chen, Chun-Hsien Lin, Shih-Hung Tsai, Po-Kuang Hsieh
  • Patent number: 10916278
    Abstract: A memory controller comprising: a delay circuit, configured to use a first delay value and a second delay value to respectively delay a sampling clock signal to generate a first and a second delayed sampling clock signal; a sampling circuit, configured to use a first edge of the first delayed sampling clock signal to sample a data signal to generate a first sampling value, and configured to use a second edge of the second delayed sampling clock signal to sample the data signal to generate a second sampling value; and a calibrating circuit, configured to generate a sampling delay value according to the first delay value based on the first sampling value and the second sampling value. The delay circuit uses the sampling delay value to generate an adjusted sampling clock signal and the sampling circuit sample the data signal by the adjusted sampling clock signal.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 9, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kuo-Wei Chi, Chun-Chi Yu, Chih-Wei Chang, Gerchih Chou, Shih-Chang Chen, Fu-Chin Tsai, Shih-Han Lin, Min-Han Tsai
  • Publication number: 20210027817
    Abstract: A method of foreground auto-calibrating data reception window for a DRAM system is disclosed. The method comprises receiving data strobe and data from a DRAM of the DARM system, capturing a data strobe clock according to the received data strobe, generating three time points with a period of the data strobe clock, sampling the data at the three time points, to obtain three sampled data, determining whether to adjust positions of the three time points according to a comparison among the three sampled data, and configuring the valid data reception window according to the positions of the three time points when determining not to adjust the positions of the three time points.
    Type: Application
    Filed: July 24, 2019
    Publication date: January 28, 2021
    Inventors: Shih-Chang Chen, Chun-Chi Yu, Chih-Wei Chang, Kuo-Wei Chi, Fu-Chin Tsai, Shih-Han Lin, GERCHIH CHOU
  • Publication number: 20200411514
    Abstract: A semiconductor device and method are provided whereby a series of spacers are formed in a first region and a second region of a substrate. The series of spacers in the first region are patterned while the series of spacers in the second region are protected in order to separate the properties of the spacers in the first region from the properties of the spacers in the second region.
    Type: Application
    Filed: February 3, 2020
    Publication date: December 31, 2020
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chi-Sheng Lai, Chih-Han Lin, Wei-Chung Sun, Ming-Ching Chang, Chao-Cheng Chen
  • Patent number: 10872918
    Abstract: An optical isolation structure and a method for fabricating the same are provided. The optical isolation structure includes an epitaxial layer and a dielectric layer. The epitaxial layer and the dielectric layer are formed in a deep trench of a semiconductor substrate. The epitaxial layer covers a lower portion of sidewall of the trench, and the dielectric layer covers an upper portion of the sidewall of the trench. In the method for fabricating the optical isolation structure, at first, shallow trenches are formed in the semiconductor substrate. Then, the dielectric layer is formed in the shallow trenches. Thereafter, deep trenches are formed passing through the dielectric layers. Then, the epitaxial layer is formed in the deep trenches.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Han Huang, Tzu-Hsiang Chen, Shih-Pei Chou, Jiech-Fun Lu
  • Patent number: 10868148
    Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: December 15, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Chang Lin, Bo-Han Huang, Chih-Chung Chen, Chun-Hsien Lin, Shih-Hung Tsai, Po-Kuang Hsieh
  • Publication number: 20200381532
    Abstract: A semiconductor device includes a fin projecting upwardly from a substrate; a gate stack engaging the fin; a gate spacer on a sidewall of the gate stack and in contact with the gate stack; and a dielectric layer on the sidewall of the gate stack and in contact with the gate stack, the dielectric layer being vertically between the fin and the gate spacer, wherein the dielectric layer has a thickness small than the gate spacer.
    Type: Application
    Filed: August 17, 2020
    Publication date: December 3, 2020
    Inventors: Che-Cheng Chang, Jr-Jung Lin, Shih-Hao Chen, Chih-Han Lin, Mu-Tsang Lin, Yung Jung Chang
  • Patent number: 10816762
    Abstract: An optical imaging lens comprises first, second, third, fourth, fifth and sixth lens elements arranged sequentially from an object side to an image side along an optical axis. Each of the lens elements has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The object-side surface of the first lens element has a convex portion in the vicinity of the optical axis. The third lens element has positive refracting power. The object-side surface of the third lens element has a concave portion in the vicinity of the optical axis. The object-side surface of the fourth lens element has a concave portion in the vicinity of the optical axis. The object-side surface of the fifth lens element has a concave portion in the vicinity of its periphery.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: October 27, 2020
    Assignee: GENIUS ELECTRONIC OPTICAL CO., LTD.
    Inventors: Shih-Han Chen, Hung Chien Hsieh, Jia-Sin Jhang
  • Publication number: 20200333563
    Abstract: An optical imaging lens includes first, second, third, fourth, fifth and sixth lens elements arranged in order from the object side to the image side along an optical axis. The object-side surface of the first lens element has a convex portion in a vicinity of a periphery of the first lens element. The second lens element has negative refractive power. The object-side surface of the second lens element has a convex portion in a vicinity of a periphery of the second lens element. The image-side surface of the fifth lens element has a concave portion in a vicinity of the optical axis. The image-side surface of the sixth lens element has a concave portion in a vicinity of the optical axis.
    Type: Application
    Filed: May 4, 2020
    Publication date: October 22, 2020
    Applicant: Genius Electronic Optical (Xiamen) Co., Ltd.
    Inventors: Shih-Han Chen, Huabin Liao, Changlin Zhao
  • Publication number: 20200333564
    Abstract: An optical imaging lens includes first, second, third, fourth, fifth and sixth lens elements arranged in order from the object side to the image side along an optical axis. The first lens element has negative refractive power. The object-side surface of the fourth lens element has a convex part in a vicinity of a periphery of the fourth lens element. The image-side surface of the sixth lens element has a convex part in a vicinity of a periphery of the sixth lens element. The effective focal length of the optical imaging lens is EFL, and a sum of all air gaps from the first lens element to the sixth lens element along the optical axis is AAG, and EFL and AAG satisfy 0.9?EFL/AAG?2.6.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 22, 2020
    Applicant: Genius Electronic Optical (Xiamen) Co., Ltd.
    Inventors: Shih-Han Chen, Huabin Liao, Changlin Zhao
  • Publication number: 20200319428
    Abstract: An optical imaging lens includes six lens elements disposed sequentially from an object side to an image side. The image-side surface of the first lens element includes a concave portion in a vicinity of an optical axis. The fifth lens element has negative refractive power and the image-side surface of the fifth lens element includes a convex portion in a vicinity of the optical axis. The image-side surface of the sixth lens element includes a concave portion in a vicinity of the optical axis. The optical imaging lens as a whole has only the six lens elements having refractive power.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 8, 2020
    Applicant: Genius Electronic Optical Co., Ltd.
    Inventors: Shih Han Chen, Junguang Zhang, Lai Shu Cao
  • Publication number: 20200312817
    Abstract: A three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is bonded to a first IC die by a first bonding structure. A third IC die is bonded to the second IC die by a second bonding structure. The second bonding structure is arranged between back sides of the second IC die and the third IC die opposite to corresponding interconnect structures and comprises a first TSV (through substrate via) disposed through a second substrate of the second IC die and a second TSV disposed through a third substrate of the third IC die. The second bonding structure further comprises conductive features with oppositely titled sidewalls disposed between the first TSV and the second TSV.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 1, 2020
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Publication number: 20200303351
    Abstract: A method for manufacturing three-dimensional (3D) integrated circuit (IC) is provided. In some embodiments, a second IC die is formed and bonded to a first IC die by a first bonding structure. A third IC die is formed and bonded to the second IC die by a second bonding structure. The second bonding structure is formed between back sides of the second IC die and the third IC die opposite to corresponding interconnect structures and comprises a first TSV (through substrate via) disposed through a second substrate of the second IC die and a second TSV disposed through a third substrate of the third IC die. In some further embodiments, the second bonding structure is formed by forming conductive features with oppositely titled sidewalls disposed between the first TSV and the second TSV.
    Type: Application
    Filed: June 9, 2020
    Publication date: September 24, 2020
    Inventors: Kuo-Ming Wu, Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao, Yung-Lung Lin, Shih-Han Huang, I-Nan Chen
  • Patent number: 10749014
    Abstract: A semiconductor device includes a substrate having a fin projecting upwardly through an isolation structure over the substrate; a gate stack over the isolation structure and engaging the fin; and a gate spacer on a sidewall of the gate stack and in physical contact with the gate stack. The semiconductor device further includes a first dielectric layer vertically between the fin and the gate spacer. The semiconductor device further includes a second dielectric layer vertically between the first dielectric layer and the gate spacer, wherein the first and second dielectric layers include different materials, and wherein the second dielectric layer is in physical contact with the gate spacer and the first dielectric layer.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che-Cheng Chang, Jr-Jung Lin, Shih-Hao Chen, Chih-Han Lin, Mu-Tsang Lin, Yung-Jung Chang
  • Publication number: 20200249447
    Abstract: A camera module includes an imaging lens assembly and an image sensor. An image is formed on the image sensor via the imaging lens assembly, the image sensor is disposed on an image side of the imaging lens assembly, and the imaging lens assembly includes a lens barrel, a plurality of plastic lens elements and a first light blocking sheet. The plastic lens elements are disposed in the lens barrel. The first light blocking sheet is disposed in the lens barrel and has a non-circular opening. A portion of the image formed via the imaging lens assembly is a defocused image, and a shape of at least one portion of the defocused image is non-circular and corresponding to a shape of the non-circular opening of the first light blocking sheet.
    Type: Application
    Filed: October 1, 2019
    Publication date: August 6, 2020
    Inventors: Shih-Han CHEN, Lin-An CHANG, Ming-Ta CHOU
  • Publication number: 20200241245
    Abstract: An imaging lens includes first to fifth lens elements arranged from an object side to an image side in the given order. Through designs of surfaces of the lens elements and relevant optical parameters, a short system length of the imaging lens may be achieved while maintaining good optical performance.
    Type: Application
    Filed: January 30, 2020
    Publication date: July 30, 2020
    Applicant: GENIUS ELECTRONIC OPTICAL CO., LTD.
    Inventors: Shih-Han Chen, Chung-Chih Chang, Yita Chiang