Patents by Inventor Shin-Chin Lien

Shin-Chin Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140264599
    Abstract: A semiconductor device having a well, a p well implant bounded at least in part within a substrate by the well, a conductive layer disposed on the substrate, a high voltage n? (HVN?) doped well implanted in the p well implant, a high voltage p doped (HVPD) well implanted in the p well implant, and a drain n? well and a source n? well disposed in the HVN? doped well and HVPD well, respectively, is provided. A method of fabricating the semiconductor device is also provided. In certain embodiments, the method of fabricating the semiconductor device is characterized by implanting the HVN? ions at a first tilt angle and/or implanting the HVPD ions at a second tilt angle.
    Type: Application
    Filed: August 16, 2013
    Publication date: September 18, 2014
    Applicant: Macronix International Co. Ltd.
    Inventors: Chien-Chung Chen, Ming-Tung Lee, Yin-Fu Huang, Shin-Chin Lien, Shyi-Yuan Wu
  • Patent number: 8686509
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a first doped region and a second doped region. The first doped region comprises a first contact region. The first doped region and the first contact region have a first type conductivity. The second doped region comprises a second contact region. The second doped region and the second contact region have a second type conductivity opposite to the first type conductivity. The first doped region is adjacent to the second doped region.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: April 1, 2014
    Assignee: Macronix International Co., Ltd.
    Inventors: Chien-Chih Chen, Li-Fan Chen, Cheng-Chi Lin, Shin-Chin Lien, Shyi-Yuan Wu
  • Publication number: 20130221404
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first doped region and has a second type conductivity opposite to the first type conductivity. The doped strip is formed in the first doped region and has the second type conductivity. The top doped region is formed in the doped strip and has the first type conductivity. The top doped region has a first sidewall and a second sidewall opposite to the first sidewall. The doped strip is extended beyond the first sidewall or the second sidewall.
    Type: Application
    Filed: February 24, 2012
    Publication date: August 29, 2013
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Ching-Lin Chan, Chen-Yuan Lin, Cheng-Chi Lin, Shin-Chin Lien
  • Publication number: 20130207191
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a first doped region and a second doped region. The first doped region comprises a first contact region. The first doped region and the first contact region have a first type conductivity. The second doped region comprises a second contact region. The second doped region and the second contact region have a second type conductivity opposite to the first type conductivity. The first doped region is adjacent to the second doped region.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 15, 2013
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chien-Chih Chen, Li-Fan Chen, Cheng-Chi Lin, Shin-Chin Lien, Shyi-Yuan Wu