Patents by Inventor Shin Iwabuchi
Shin Iwabuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088184Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tetsuya UCHIDA, Ryoji SUZUKI, Hisahiro ANSAI, Yoichi Ueda, Shinichi YOSHIDA, Yukari TAKEYA, Tomoyuki HIRANO, Hiroyuki MORI, Hirotoshi NOMURA, Yoshiharu KUDOH, Masashi OHURA, Shin IWABUCHI
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Patent number: 11888008Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.Type: GrantFiled: September 29, 2021Date of Patent: January 30, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Tetsuya Uchida, Ryoji Suzuki, Hisahiro Ansai, Yoichi Ueda, Shinichi Yoshida, Yukari Takeya, Tomoyuki Hirano, Hiroyuki Mori, Hirotoshi Nomura, Yoshiharu Kudoh, Masashi Ohura, Shin Iwabuchi
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Patent number: 11722800Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: GrantFiled: December 8, 2021Date of Patent: August 8, 2023Assignee: Sony Group CorporationInventors: Shin Iwabuchi, Makoto Motoyoshi
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Publication number: 20230197753Abstract: The present disclosure relates to a solid-state image element and an electronic device provided as a solid-state image element and an electronic device capable of suppressing the occurrence of a strong electrical field near a transistor while being compact. The solid-state image element includes a photoelectric conversion element that performs photoelectric conversion, an element isolation that penetrates from a first main surface to a second main surface of a substrate and that is formed between pixels including the photoelectric conversion element, and a conductor part provided in close contact with a first main surface side of the element isolation. The present technology can be applied to, for example, a solid-state image element and an electronic device including the solid-state image element.Type: ApplicationFiled: March 15, 2021Publication date: June 22, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shin IWABUCHI, Tomomi ITO, Atsushi MASAGAKI, Yoshiharu KUDOH
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Patent number: 11587968Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The device includes a photoelectric conversion section; a trench between the photoelectric conversion sections in adjacent pixels; and a PN junction region on a sidewall of the trench and including a P-type region and an N-type region, the P-type region having a protruding region. The device can include an inorganic photoelectric conversion section having a pn junction and an organic photoelectric conversion section having an organic photoelectric conversion film that are stacked in a depth direction within a same pixel; and a PN junction region on a sidewall of the inorganic photoelectric conversion section. The PN junction region can further include a first P-type region and an N-type region; and a second P-type region. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.Type: GrantFiled: October 26, 2018Date of Patent: February 21, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masashi Ohura, Shin Iwabuchi, Atsushi Okuyama
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Patent number: 11398514Abstract: The present technology relates to a solid-state image pickup device that suppresses dark current while increasing the saturated charge amount, a manufacturing method therefor, and an electronic apparatus. The device includes a first photoelectric converter on a front surface side opposite to a light incident surface side of a substrate; a second photoelectric converter stacked on the first photoelectric converter; and a pixel isolation section, the pixel isolation section passing through the substrate. The first photoelectric converter includes a first plane-direction PN junction region joined in a plane direction parallel to a light incident surface of the substrate and a first perpendicular-direction PN junction region along a side wall of the pixel isolation section. The second photoelectric converter includes a second plane-direction PN junction region and a second perpendicular-direction PN junction region.Type: GrantFiled: March 6, 2019Date of Patent: July 26, 2022Assignee: Sony Semiconductor Solutions CorporationInventor: Shin Iwabuchi
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Publication number: 20220124270Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: ApplicationFiled: December 8, 2021Publication date: April 21, 2022Inventors: Shin Iwabuchi, Makoto Motoyoshi
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Publication number: 20220020799Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.Type: ApplicationFiled: September 29, 2021Publication date: January 20, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tetsuya UCHIDA, Ryoji SUZUKI, Hisahiro ANSAI, Yoichi Ueda, Shinichi YOSHIDA, Yukari TAKEYA, Tomoyuki HIRANO, Hiroyuki MORI, Hirotoshi NOMURA, Yoshiharu KUDOH, Masashi OHURA, Shin IWABUCHI
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Patent number: 11228728Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: GrantFiled: April 30, 2020Date of Patent: January 18, 2022Assignee: Sony Group CorporationInventors: Shin Iwabuchi, Makoto Motoyoshi
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Patent number: 11171167Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.Type: GrantFiled: February 22, 2018Date of Patent: November 9, 2021Assignee: Sony Semiconductor Solutions CorporationInventors: Tetsuya Uchida, Ryoji Suzuki, Hisahiro Ansai, Yoichi Ueda, Shinichi Yoshida, Yukari Takeya, Tomoyuki Hirano, Hiroyuki Mori, Hirotoshi Nomura, Yoshiharu Kudoh, Masashi Ohura, Shin Iwabuchi
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Publication number: 20210151478Abstract: The present technology relates to a solid-state image pickup device that suppresses dark current while increasing the saturated charge amount, a manufacturing method therefor, and an electronic apparatus. The device includes a first photoelectric converter on a front surface side opposite to a light incident surface side of a substrate; a second photoelectric converter stacked on the first photoelectric converter; and a pixel isolation section, the pixel isolation section passing through the substrate. The first photoelectric converter includes a first plane-direction PN junction region joined in a plane direction parallel to a light incident surface of the substrate and a first perpendicular-direction PN junction region along a side wall of the pixel isolation section. The second photoelectric converter includes a second plane-direction PN junction region and a second perpendicular-direction PN junction region.Type: ApplicationFiled: March 6, 2019Publication date: May 20, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Shin IWABUCHI
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Publication number: 20210143196Abstract: There is provided a imaging device including: an N-type region formed for each pixel and configured to perform photoelectric conversion; an inter-pixel light-shielding wall penetrating a semiconductor substrate in a depth direction and formed between N-type regions configured to perform the photoelectric conversion, the N-type regions each being formed for each of pixels adjacent to each other; a P-type layer formed between the N-type region configured to perform the photoelectric conversion and the inter-pixel light-shielding wall; and a P-type region adjacent to the P-type layer and formed between the N-type region and an interface on a side of a light incident surface of the semiconductor substrate.Type: ApplicationFiled: February 22, 2018Publication date: May 13, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Tetsuya UCHIDA, Ryoji SUZUKI, Hisahiro ANSAI, Yoichi Ueda, Shinichi YOSHIDA, Yukari TAKEYA, Tomoyuki HIRANO, Hiroyuki MORI, Hirotoshi NOMURA, Yoshiharu KUDOH, Masashi OHURA, Shin IWABUCHI
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Publication number: 20210021776Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: ApplicationFiled: April 30, 2020Publication date: January 21, 2021Inventors: Shin Iwabuchi, Makoto Motoyoshi
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Publication number: 20200350346Abstract: The present technology relates to a solid-state imaging device capable of suppressing deterioration in dark characteristics, and an electronic apparatus. The device includes a photoelectric conversion section; a trench between the photoelectric conversion sections in adjacent pixels; and a PN junction region on a sidewall of the trench and including a P-type region and an N-type region, the P-type region having a protruding region. The device can include an inorganic photoelectric conversion section having a pn junction and an organic photoelectric conversion section having an organic photoelectric conversion film that are stacked in a depth direction within a same pixel; and a PN junction region on a sidewall of the inorganic photoelectric conversion section. The PN junction region can further include a first P-type region and an N-type region; and a second P-type region. The present technology can be applied to, for example, a back-illuminated CMOS image sensor.Type: ApplicationFiled: October 26, 2018Publication date: November 5, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masashi OHURA, Shin IWABUCHI, Atsushi OKUYAMA
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Patent number: 10645324Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: GrantFiled: March 13, 2017Date of Patent: May 5, 2020Assignee: Sony CorporationInventors: Shin Iwabuchi, Makoto Motoyoshi
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Publication number: 20200111830Abstract: The present disclosure relates to a semiconductor device, a solid state imaging element, and an electronic apparatus in which the adverse effect due to hot carrier luminescence can be suppressed. In them, an element formation unit in which a plurality of elements are formed and an interconnection unit in which interconnections connecting elements are formed are stacked. A structure object formed between a light receiving element that receives light and performs photoelectric conversion and an active element that forms a peripheral circuit placed around the light receiving element in such a manner that the gap in the thickness direction of the element formation unit is not more than a prescribed spacing and formed of a material that inhibits the propagation of light is placed in the element formation unit. The present technology can be applied to a back-side illumination solid state imaging element, for example.Type: ApplicationFiled: December 10, 2019Publication date: April 9, 2020Applicant: SONY CORPORATIONInventors: Shoji KOBAYASHI, Shin IWABUCHI, Toshikazu SHIBAYAMA, Mamoru SUZUKI, Shunsuke MARUYAMA
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Patent number: 10594972Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: GrantFiled: May 9, 2016Date of Patent: March 17, 2020Assignee: Sony CorporationInventors: Shin Iwabuchi, Makoto Motoyoshi
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Patent number: 10529764Abstract: The present disclosure relates to a semiconductor device, a solid state imaging element, and an electronic apparatus in which the adverse effect due to hot carrier luminescence can be suppressed. In them, an element formation unit in which a plurality of elements are formed and an interconnection unit in which interconnections connecting elements are formed are stacked. A structure object formed between a light receiving element that receives light and performs photoelectric conversion and an active element that forms a peripheral circuit placed around the light receiving element in such a manner that the gap in the thickness direction of the element formation unit is not more than a prescribed spacing and formed of a material that inhibits the propagation of light is placed in the element formation unit. The present technology can be applied to a back-side illumination solid state imaging element, for example.Type: GrantFiled: October 24, 2014Date of Patent: January 7, 2020Assignee: Sony CorporationInventors: Shoji Kobayashi, Shin Iwabuchi, Toshikazu Shibayama, Mamoru Suzuki, Shunsuke Maruyama
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Patent number: 10453885Abstract: The present disclosure relates to a solid-state imaging apparatus and an electronic device capable of reducing a product yield and reliability risk. By forming a contact by forming an opening in an insulating film on a back surface of a peripheral circuit region without connecting a light-shielding metal on the peripheral circuit region to the ground (GND), the light-shielding metal is connected to a Si substrate. Furthermore, a light-shielding metal on a pixel region is connected to the ground (GND). Therefore, by disposing an isolated region (insulating region) where no metal is formed between the light-shielding metal on the pixel region and the light-shielding metal on the peripheral circuit region, the light-shielding metal on the pixel region does not cause a short circuit with the light-shielding metal on the peripheral circuit region. The present disclosure can be applied to, for example, a CMOS solid-state imaging apparatus used for an imaging apparatus such as a camera.Type: GrantFiled: August 26, 2016Date of Patent: October 22, 2019Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shin Iwabuchi, Kazuhiro Satou, Kensuke Motozono, Masatoshi Iwamoto
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Patent number: 10129497Abstract: A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.Type: GrantFiled: November 1, 2017Date of Patent: November 13, 2018Assignee: Sony CorporationInventors: Shin Iwabuchi, Makoto Motoyoshi