Patents by Inventor Shingo KABUTOYA

Shingo KABUTOYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178663
    Abstract: A semiconductor device A1 includes: a semiconductor layer including a trench; an insulating film covering an inner surface of the trench; a conductor embedded in the trench covered with the insulating film; a silicide layer; and a metal layer. A Schottky junction is formed by the silicide layer and a region being part of a semiconductor layer surface and being adjacent to the trench. A region including an end face of the silicide layer and an upper end face of the insulating film is covered with the metal layer, with no gap between one part and another part of the metal layer on the region. The end face is located at elevations higher than the upper end face. The metal layer and the silicide layer contain the same kind of metallic element.
    Type: Application
    Filed: April 22, 2021
    Publication date: June 8, 2023
    Applicant: KYOCERA Corporation
    Inventor: Shingo KABUTOYA
  • Publication number: 20230137811
    Abstract: An insulating film is formed on a front surface of a semiconductor layer in which a trench has been formed. An electric conductor is embedded into the trench, and the insulating film that has been formed on the semiconductor layer surface and that is adjacent to the trench is removed by etching so as to expose the semiconductor layer surface. The semiconductor layer surface is further etched such that the semiconductor layer surface is lowered relative to an upper end of the insulating film covering the inner surface of the trench. After that, a Schottky barrier junction is formed at the semiconductor layer surface.
    Type: Application
    Filed: March 18, 2021
    Publication date: May 4, 2023
    Applicant: KYOCERA Corporation
    Inventor: Shingo KABUTOYA
  • Publication number: 20230101385
    Abstract: A semiconductor device includes: a semiconductor layer including a trench; an insulating film covering an inner surface of the trench; a conductor embedded in the trench covered with the insulating film; and a Schottky junction layer. A Schottky junction is formed by the Schottky junction layer and a region being part of a semiconductor layer surface and being adjacent to the trench. A surface of the conductor is located at an elevation lower than the surface of the semiconductor layer. The semiconductor layer surface includes a sloping portion adjacent to an inner wall surface of the trench. The sloping portion has a downward gradient that is steeper in a region closer to the inner wall surface.
    Type: Application
    Filed: April 22, 2021
    Publication date: March 30, 2023
    Applicant: KYOCERA Corporation
    Inventor: Shingo KABUTOYA
  • Patent number: 11393933
    Abstract: A semiconductor device includes first and second layers and first and second electrodes. The first layer has a first semiconductor containing an impurity of a first conductivity type. The second layer is in contact with the first layer and has a second semiconductor containing the impurity at a lower concentration than the first semiconductor. The first electrode is in contact with a first surface of the first layer. The second electrode is in contact with a second surface of the second layer. The second layer further has first and second trenches. The first trench has therein a third electrode connected to the second electrode. The second trench is located closer to an outer perimeter portion of the second layer than the first trench and has therein a fourth electrode connected to the second electrode. An entire outer perimeter end of the second electrode is in contact with the fourth electrode.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: July 19, 2022
    Assignee: KYOCERA CORPORATION
    Inventor: Shingo Kabutoya
  • Publication number: 20220139780
    Abstract: The following are performed in this method for producing a semiconductor device: a step for forming multiple surface electrode metals joined to a surface of a semiconductor layer on a wafer on which multiple semiconductor devices are attached; a step for excavating a semiconductor layer outside an outer edge of the surface electrode metal to form an outermost edge trench of the semiconductor device; a dicing step for cutting out individual semiconductor devices from the wafer; and a kerf check performed after the dicing step by checking the distance from the outermost edge trench to the chip outline position of the semiconductor device.
    Type: Application
    Filed: February 28, 2020
    Publication date: May 5, 2022
    Applicant: KYOCERA Corporation
    Inventor: Shingo KABUTOYA
  • Publication number: 20210265511
    Abstract: A semiconductor device includes first and second layers and first and second electrodes. The first layer has a first semiconductor containing an impurity of a first conductivity type. The second layer is in contact with the first layer and has a second semiconductor containing the impurity at a lower concentration than the first semiconductor. The first electrode is in contact with a first surface of the first layer. The second electrode is in contact with a second surface of the second layer. The second layer further has first and second trenches. The first trench has therein a third electrode connected to the second electrode. The second trench is located closer to an outer perimeter portion of the second layer than the first trench and has therein a fourth electrode connected to the second electrode. An entire outer perimeter end of the second electrode is in contact with the fourth electrode.
    Type: Application
    Filed: June 26, 2019
    Publication date: August 26, 2021
    Applicant: KYOCERA Corporation
    Inventor: Shingo KABUTOYA