Patents by Inventor Shinichi Izuo
Shinichi Izuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9521737Abstract: In a power module, a power semiconductor element is mounted on a heat dissipation substrate having a tilted part formed at an end portion thereof, a resin case is arranged so as to surround the power semiconductor element and to contact the heat dissipation substrate, and a cooling fin is arranged so as to contact a surface of the heat dissipation substrate opposite a surface of the heat dissipation substrate on which the power semiconductor element is mounted. The power module includes pressure member contacting the tilted part of the heat dissipation substrate to press the heat dissipation substrate against the cooling fin.Type: GrantFiled: May 20, 2013Date of Patent: December 13, 2016Assignee: Mitsubishi Electric CorporationInventors: Shinichi Izuo, Masaki Taya, Taichi Obara, Nobuya Nishida
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Publication number: 20150289356Abstract: In a power module, a power semiconductor element is mounted on a heat dissipation substrate having a tilted part formed at an end portion thereof, a resin case is arranged so as to surround the power semiconductor element and to contact the heat dissipation substrate, and a cooling fin is arranged so as to contact a surface of the heat dissipation substrate opposite a surface of the heat dissipation substrate on which the power semiconductor element is mounted. The power module includes pressure member contacting the tilted part of the heat dissipation substrate to press the heat dissipation substrate against the cooling fin.Type: ApplicationFiled: May 20, 2013Publication date: October 8, 2015Applicant: Mitsubishi Electric CorporationInventors: Shinichi Izuo, Masaki Taya, Taichi Obara, Nobuya Nishida
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Patent number: 8710600Abstract: A semiconductor pressure sensor that can improve diaphragm breakage pressure tolerance is provided. Included are: a first semiconductor substrate on which is formed a recess portion that has an opening on a first surface in a thickness direction; a second semiconductor substrate that is disposed so as to face the first surface of the first semiconductor substrate; and a first silicon oxide film that is interposed between the first semiconductor substrate and the second semiconductor substrate, and on which is formed a penetrating aperture that communicates between the recess portion and the second semiconductor substrate, and at least a portion of an edge portion of the penetrating aperture is positioned inside an opening edge portion of the recess portion when viewed from a side facing the penetrating aperture and the opening of the recess portion.Type: GrantFiled: November 18, 2010Date of Patent: April 29, 2014Assignee: Mitsubishi Electric CorporationInventors: Eiji Yoshikawa, Shinichi Izuo
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Patent number: 8647908Abstract: A semiconductor pressure sensor includes a first substrate having a concave portion and an alignment mark at a main surface thereof, and a second substrate formed on the main surface of the first substrate and having a diaphragm provided to cover a space inside the concave portion of the first substrate and a gauge resistor provided on the diaphragm. The alignment mark is provided to be exposed from the second substrate. Accordingly, it is possible to obtain a semiconductor pressure sensor and a method of manufacturing the same with reduced production costs and with improved pressure measuring accuracy.Type: GrantFiled: March 7, 2012Date of Patent: February 11, 2014Assignee: Mitsubishi Electric CorporationInventors: Eiji Yoshikawa, Shinichi Izuo
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Publication number: 20130309416Abstract: An atmospheric pressure plasma treatment apparatus includes a moving unit configured to relatively move an atmospheric pressure plasma treatment head and member to be treated, gas supply units configured to supply a reaction gas and a curtain gas, and a control unit. When the atmospheric pressure plasma treatment head and the member are relatively moved, the control unit performs control to increase a flow rate of the reaction gas and the curtain gas from an opposite direction side of a relative moving direction of the member with respect to the atmospheric pressure plasma treatment head and reduce a flow rate of the reaction gas and the curtain gas in the relative moving direction side of the member compared with the flow rates of the reaction gas and the curtain gas flowing when the atmospheric pressure plasma treatment head and the member are not relatively moved.Type: ApplicationFiled: November 21, 2011Publication date: November 21, 2013Applicant: Mitsubishi Electric CorporationInventors: Yoshinori Yokoyama, Shinichi Izuo, Yukihisa Yoshida, Takaaki Murakami
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Publication number: 20130105922Abstract: A semiconductor pressure sensor includes a first substrate having a concave portion and an alignment mark at a main surface thereof, and a second substrate formed on the main surface of the first substrate and having a diaphragm provided to cover a space inside the concave portion of the first substrate and a gauge resistor provided on the diaphragm. The alignment mark is provided to be exposed from the second substrate. Accordingly, it is possible to obtain a semiconductor pressure sensor and a method of manufacturing the same with reduced production costs and with improved pressure measuring accuracy.Type: ApplicationFiled: March 7, 2012Publication date: May 2, 2013Applicant: Mitsubishi Electric CorporationInventors: Eiji YOSHIKAWA, Shinichi IZUO
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Publication number: 20120168082Abstract: A plasma generating apparatus irradiates plasma on a treatment object. The plasma is generated under gas pressure equal to or higher than 100 pascals and equal to or lower than atmospheric pressure in an inter-electrode gap between a first electrode to which a power supply is connected and a second electrode arranged to be opposed to the first electrode and grounded. The first electrode has a structure in which the first electrode is retained on a grounded conductive retaining member via a solid dielectric provided on a surface not opposed to the second electrode, and a conductive film is continuously provided on a surface in a predetermined range in contact with the conductive retaining member and a surface in a predetermined range not in contact with the conductive retaining member on a surface of the solid dielectric.Type: ApplicationFiled: July 15, 2010Publication date: July 5, 2012Applicant: Mitsubishi Electric CorporationInventors: Shinichi Izuo, Yukihisa Yoshida, Takaaki Murakami
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Publication number: 20110278685Abstract: A semiconductor pressure sensor that can improve diaphragm breakage pressure tolerance is provided. Included are: a first semiconductor substrate on which is formed a recess portion that has an opening on a first surface in a thickness direction; a second semiconductor substrate that is disposed so as to face the first surface of the first semiconductor substrate; and a first silicon oxide film that is interposed between the first semiconductor substrate and the second semiconductor substrate, and on which is formed a penetrating aperture that communicates between the recess portion and the second semiconductor substrate, and at least a portion of an edge portion of the penetrating aperture is positioned inside an opening edge portion of the recess portion when viewed from a side facing the penetrating aperture and the opening of the recess portion.Type: ApplicationFiled: November 18, 2010Publication date: November 17, 2011Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Eiji YOSHIKAWA, Shinichi IZUO
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Patent number: 7786541Abstract: A semiconductor pressure sensor comprises a silicon support substrate (1), an insulating layer (2) formed on the silicon support substrate (1), and a silicon thin plate (3) formed on the insulating layer (2). A through-hole (1a) extending in the thickness direction of the silicon support substrate (1) is formed in the silicon support substrate (1). The silicon thin plate (3) located on an extension of the through-hole (1a) functions as a diaphragm (23) that is deformed by an external pressure. The insulating layer (2) remains over the entire lower surface of the diaphragm (23). The thickness of the insulating layer (2) decreases from the peripheral portion toward the central portion of the diaphragm (23). This provides the semiconductor pressure sensor capable of reducing both the offset voltage and the variation of output voltage caused by the variation of temperature and its fabrication method.Type: GrantFiled: August 30, 2006Date of Patent: August 31, 2010Assignee: Mitsubishi Electric CorporationInventors: Shinichi Izuo, Motohisa Taguchi, Akira Yamashita, Yukihisa Yoshida
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Publication number: 20090243010Abstract: A substrate holding unit, a plasma treatment chamber, and a nanoparticle supplying chamber are housed in a single chamber. The substrate holding unit holds a substrate. The plasma treatment chamber includes a gas passage for introducing a source gas to a vicinity of the substrate and a plasma generating unit that generates a plasma from the source gas. The nanoparticle supplying chamber includes a spraying member for spraying a nanoparticle-containing medium onto a surface of the substrate.Type: ApplicationFiled: March 27, 2009Publication date: October 1, 2009Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Kazuyasu Nishikawa, Satoshi Yamakawa, Shinichi Izuo, Hiroshi Fukumoto
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Publication number: 20090140355Abstract: A semiconductor pressure sensor comprises a silicon support substrate (1), an insulating layer (2) formed on the silicon support substrate (1), and a silicon thin plate (3) formed on the insulating layer (2). A through-hole (1a) extending in the thickness direction of the silicon support substrate (1) is formed in the silicon support substrate (1). The silicon thin plate (3) located on an extension of the through-hole (1a) functions as a diaphragm (23) that is deformed by an external pressure. The insulating layer (2) remains over the entire lower surface of the diaphragm (23). The thickness of the insulating layer (2) decreases from the peripheral portion toward the central portion of the diaphragm (23). This provides the semiconductor pressure sensor capable of reducing both the offset voltage and the variation of output voltage caused by the variation of temperature and its fabrication method.Type: ApplicationFiled: August 30, 2006Publication date: June 4, 2009Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinichi Izuo, Motohisa Taguchi, Akira Yamashita, Yukihisa Yoshida
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Publication number: 20090027138Abstract: A switch circuit including: a plurality of MEMS switches connected in parallel or in series, which have different drive voltages; and a single voltage supply for driving the plurality of MEMS switches by the plurality of drive voltages, is used for a microwave circuit or an antenna circuit, to vary a configuration of the microwave circuit or the antenna circuit based on the drive voltage value. That is, the configuration of the microwave circuit or the antenna circuit can be varied based on the drive voltage value by using the switch circuit including the MEMS switches having the different drive voltages for the microwave circuit or the antenna circuit.Type: ApplicationFiled: March 29, 2005Publication date: January 29, 2009Inventors: Tamotsu Nishino, Masatake Hangai, Yukihisa Yoshida, Shinichi Izuo, Hirokazu Taketomi, Tomohiro Takahashi, Kenichiro Kodama, Kazushi Nishizawa, Yoko Koga, Araki Ohno, Shinnosuke Soda, Moriyasu Miyazaki, Kenichi Miyaguchi
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Patent number: 7135752Abstract: A dielectric isolation type semiconductor device and a manufacturing method therefor achieve high dielectric resistance while preventing the dielectric strength of the semiconductor device from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A semiconductor substrate (1) and an n? type semiconductor layer (2) are bonded to each other through a buried oxide film layer (3). A first porous oxide film area (10) is formed in the semiconductor substrate in a state contacting with the buried oxide film layer. A power device is formed on the n? type semiconductor layer. The first porous oxide film area is formed in an area including a location right under a first main electrode (6) and extending from the first main electrode side up to a range of more than 40% of a distance (L) between the first and second main electrodes (6, 7).Type: GrantFiled: November 8, 2004Date of Patent: November 14, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hajime Akiyama, Shinichi Izuo
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Patent number: 7125780Abstract: A dielectric isolation type semiconductor device and a manufacturing method therefor achieve high dielectric resistance while preventing the dielectric strength of the semiconductor device from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A semiconductor substrate (1) and an n? type semiconductor layer (2) are bonded to each other through a buried oxide film layer (3). A first porous oxide film area (10) is formed in the semiconductor substrate in a state contacting with the buried oxide film layer. A power device is formed on the n? type semiconductor layer. The first porous oxide film area is formed in an area including a location right under a first main electrode (6) and extending from the first main electrode side up to a range of more than 40% of a distance (L) between the first and second main electrodes (6, 7).Type: GrantFiled: February 16, 2006Date of Patent: October 24, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hajime Akiyama, Shinichi Izuo
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Publication number: 20060138586Abstract: A dielectric isolation type semiconductor device and a manufacturing method therefor achieve high dielectric resistance while preventing the dielectric strength of the semiconductor device from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A semiconductor substrate (1) and an n? type semiconductor layer (2) are bonded to each other through a buried oxide film layer (3). A first porous oxide film area (10) is formed in the semiconductor substrate in a state contacting with the buried oxide film layer. A power device is formed on the n? type semiconductor layer. The first porous oxide film area is formed in an area including a location right under a first main electrode (6) and extending from the first main electrode side up to a range of more than 40% of a distance (L) between the first and second main electrodes (6, 7).Type: ApplicationFiled: February 16, 2006Publication date: June 29, 2006Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Hajime Akiyama, Shinichi Izuo
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Publication number: 20050127470Abstract: A dielectric isolation type semiconductor device and a manufacturing method therefor achieve high dielectric resistance while preventing the dielectric strength of the semiconductor device from being limited depending on the thickness of a dielectric layer and the thickness of a first semiconductor layer. A semiconductor substrate (1) and an n? type semiconductor layer (2) are bonded to each other through a buried oxide film layer (3). A first porous oxide film area (10) is formed in the semiconductor substrate in a state contacting with the buried oxide film layer. A power device is formed on the n? type semiconductor layer. The first porous oxide film area is formed in an area including a location right under a first main electrode (6) and extending from the first main electrode side up to a range of more than 40% of a distance (L) between the first and second main electrodes (6, 7).Type: ApplicationFiled: November 8, 2004Publication date: June 16, 2005Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Hajime Akiyama, Shinichi Izuo
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Patent number: 6790340Abstract: An electrochemical etching system has an etching bath for holding an n-type silicon substrate with a first surface of the substrate in contact with hydrofluoric acid, an electrode positioned in the hydrofluoric acid, a power source having a positive pole connected to the silicon substrate and a negative pole connected to the electrode, and an illumination unit having a light source for illumination of a second surface of the silicon substrate. The illumination unit illuminates the second surface of the silicon substrate with an illumination intensity of 10 m W/cm2 or more. A ratio of a maximum illumination to a minimum illumination of the second surface of the silicon substrate is 1.69:1 or less. With the etching system, pores and/or trenches of a certain size and shape can be formed in an entire area of the silicon substrate having a diameter of more than three inches.Type: GrantFiled: December 11, 2001Date of Patent: September 14, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shinichi Izuo, Hiroshi Ohji, Kazuhiko Tsutsumi, Patrick James French
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Publication number: 20020079490Abstract: Providing a columnar structure having a uniform shape and excellent heat resistance and mechanical strength that is formed on a substrate of silicon, a method of preparing the structure, and a DNA separation device prepared by the method.Type: ApplicationFiled: October 4, 2001Publication date: June 27, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Shinichi Izuo, Hiroshi Ohji, Kazuhiko Tsutsumi