Patents by Inventor Shinichi Muramatsu

Shinichi Muramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10738326
    Abstract: The present invention provides a means for transferring a therapeutic gene of interest into a nervous system cell by a highly-efficient and simpler means. More specifically, the present invention provides a recombinant vector that uses an adeno-associated virus (AAV), a method for manufacturing the recombinant vector, and a method for using the recombinant vector. More specifically, recombinant adeno-associated virus virions, which are capable of passing through the brain-brain barrier, for transferring a therapeutic genes of interest into a nervous system cell in a highly-efficient manner, a drug composition containing the recombinant adeno-associated virus virions, a method for manufacturing the recombinant adeno-associated virus virions, and a kit or the like are provided.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: August 11, 2020
    Assignee: Jichi Medical University
    Inventor: Shinichi Muramatsu
  • Publication number: 20200088924
    Abstract: To suppress a phenomenon where an optical axis of the optically anisotropic layer is tilted when the optically anisotropic layer is produced by using a liquid crystalline compound showing smectic phase as a materials showing a higher level of orderliness. An optically anisotropic layer wherein a polymerizable composition, containing one or more polymerizable rod-like liquid crystal compound showing a smectic phase, is fixed in a state of smectic phase, and a direction of maximum refractive index of the optically anisotropic layer is inclined at 10° or smaller to the surface of the optically anisotropic layer, a method for manufacturing the same, a laminate and a method for manufacturing the same, a polarizing plate, a liquid crystal display device, and an organic EL display device.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 19, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Ayako MURAMATSU, Shinnosuke SAKAI, Teruki NIORI, Shinichi MORISHIMA
  • Publication number: 20200075896
    Abstract: The present invention provides an organic EL image display device including a light emitting element substrate, and a circularly polarizing plate, in which the light emitting element substrate includes a reflecting layer and an organic electroluminescent layer on the reflecting layer, the reflecting layer, the organic electroluminescent layer, and the circularly polarizing plate are arranged in this order, a polarization separation layer is provided between the organic electroluminescent layer and the circularly polarizing plate, the polarization separation layer includes a polarization separation region that reflects light of one polarization state in light emitted from the organic electroluminescent layer, and transmits light of another polarization state, and a visible light transmission region, the polarization separation region is formed of a layer formed by immobilizing a cholesteric liquid crystalline phase, and a positive C region-containing layer is provided between the organic electroluminescent lay
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Ayako MURAMATSU, Daisuke KASHIWAGI, Shinichi YOSHINARI, Kunihiro ATSUMI, Ryoji GOTO
  • Publication number: 20200061735
    Abstract: The present invention relates to a magnet wire bonding method and a bonding structure, and more particularly to a new improvement for ultrasonically bonding a longitudinal outer peripheral surface of a magnet wire having no entangling part to a flat surface of a flat part of a terminal pin. A magnet wire bonding method and structure, comprising: using a terminal pin (11) having a flat plate part (40) provided in a pin part (11a) as a terminal pin holding part (3); placing a magnet wire (13) in a longitudinally spread state on a flat surface (40a) of the flat plate part (40) without being entangled; and ultrasonically bonding an outer peripheral surface (13E) of the magnet wire (13) onto the flat surface (40a) with an ultrasonic horn (50).
    Type: Application
    Filed: June 26, 2019
    Publication date: February 27, 2020
    Inventors: Hiroshi KUSHIHARA, Kazuyuki ISHIBASHI, Hirofumi MARUYAMA, Shinichi ARAI, Toshiki MURAMATSU, Shinichi HARA, Katsutoshi TOYOTAKE
  • Publication number: 20200020889
    Abstract: An organic EL image display device that includes a light emitting element substrate; and a circularly polarizing plate. The light emitting element substrate includes a reflecting layer and an organic electroluminescent layer group arranged in a matrix form on the reflecting layer. The reflecting layer, the organic electroluminescent layer group, and the circularly polarizing plate are arranged in this order. A polarization separation layer is provided between the organic electroluminescent layer group and the circularly polarizing plate, and includes polarization separation sites arranged in a matrix form corresponding to the organic electroluminescent layer group. The polarization separation site reflects light of one polarization state and transmits light of the other polarization state in light emitted from the corresponding organic electroluminescent layer. The polarization separation site is divided by a visible light transmission region.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 16, 2020
    Applicant: FUJIFILM Corporation
    Inventors: Ayako MURAMATSU, Daisuke KASHIWAGI, Shinichi YOSHINARI, Ryoji GOTO
  • Patent number: 10527766
    Abstract: To suppress a phenomenon where an optical axis of the optically anisotropic layer is tilted when the optically anisotropic layer is produced by using a liquid crystalline compound showing smectic phase as a materials showing a higher level of orderliness. An optically anisotropic layer wherein a polymerizable composition, containing one or more polymerizable rod-like liquid crystal compound showing a smectic phase, is fixed in a state of smectic phase, and a direction of maximum refractive index of the optically anisotropic layer is inclined at 10° or smaller to the surface of the optically anisotropic layer, a method for manufacturing the same, a laminate and a method for manufacturing the same, a polarizing plate, a liquid crystal display device, and an organic EL display device.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: January 7, 2020
    Assignee: FUJIFILM Corporation
    Inventors: Ayako Muramatsu, Shinnosuke Sakai, Teruki Niori, Shinichi Morishima
  • Patent number: 10365273
    Abstract: Provided is a fluorescence immunoassay sensor chip and a fluorescence immunoassay method, which are capable of measuring, at the same time, a marker requiring high sensitivity due to its low content in a sample solution and a marker not requiring high sensitivity due to its high content in a sample solution. The fluorescence immunoassay sensor chip for use in fluorescence immunoassay for detecting and measuring markers contained in a sample solution includes: a dielectric member; a metal thin film formed on part of a main surface of the dielectric member; a first sensor part formed in a predetermined position on the metal thin film; and a second sensor part directly formed in a predetermined position on the dielectric member, wherein a ligand immobilized in the first sensor part and a ligand immobilized in the second sensor part capture different types of markers.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: July 30, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Makiko Ootani, Tsuruki Tamura, Shinichi Muramatsu
  • Publication number: 20180180545
    Abstract: Provided is a measurement method with which an analyte in a sample containing a high concentration of the analyte can be measured with high accuracy without diluting the sample in multiple stages. An embodiment of the present invention relates to a measurement method for measuring an amount of an analyte in a sample, the method including: a binding step of providing the sample to a containing part of a measuring chip including the containing part for containing liquid, and a first capture body immobilized inside the containing part and having a recognition site that specifically binds to the analyte so as to bind the analyte contained in the sample to the first capture body; and a measurement step of measuring an amount of the analyte bound to the first capture body.
    Type: Application
    Filed: June 10, 2016
    Publication date: June 28, 2018
    Inventors: SHINICHI MURAMATSU, KEIZOU TAKANO
  • Publication number: 20160123972
    Abstract: Provided is a fluorescence immunoassay sensor chip and a fluorescence immunoassay method, which are capable of measuring, at the same time, a marker requiring high sensitivity due to its low content in a sample solution and a marker not requiring high sensitivity due to its high content in a sample solution. The fluorescence immunoassay sensor chip for use in fluorescence immunoassay for detecting and measuring markers contained in a sample solution includes: a dielectric member; a metal thin film formed on part of a main surface of the dielectric member; a first sensor part formed in a predetermined position on the metal thin film; and a second sensor part directly formed in a predetermined position on the dielectric member, wherein a ligand immobilized in the first sensor part and a ligand immobilized in the second sensor part capture different types of markers.
    Type: Application
    Filed: June 5, 2014
    Publication date: May 5, 2016
    Inventors: Makiko OOTANI, Tsuruki TAMURA, Shinichi MURAMATSU
  • Publication number: 20130224836
    Abstract: The present invention provides a means for transferring a therapeutic gene of interest into a nervous system cell by a highly-efficient and simpler means. More specifically, the present invention provides a recombinant vector that uses an adeno-associated virus (AAV), a method for manufacturing the recombinant vector, and a method for using the recombinant vector. More specifically, recombinant adeno-associated virus virions, which are capable of passing through the brain-brain barrier, for transferring a therapeutic genes of interest into a nervous system cell in a highly-efficient manner, a drug composition containing the recombinant adeno-associated virus virions, a method for manufacturing the recombinant adeno-associated virus virions, and a kit or the like are provided.
    Type: Application
    Filed: October 26, 2011
    Publication date: August 29, 2013
    Applicant: JICHI MEDICAL UNIVERSITY
    Inventor: Shinichi Muramatsu
  • Patent number: 7082201
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: July 25, 2006
    Assignee: Yamaha Corporation
    Inventors: Hiromi Sotome, Shigeo Ando, Shinichi Muramatsu, Akio Takahashi
  • Patent number: 7076068
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: July 11, 2006
    Assignee: Yamaha Corporation
    Inventors: Hiromi Sotome, Shigeo Ando, Shinichi Muramatsu, Akio Takahashi, Hiroshi Iriyama
  • Patent number: 6850621
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: February 1, 2005
    Assignee: Yamaha Corporation
    Inventors: Hiromi Sotome, Shigeo Ando, Shinichi Muramatsu, Akio Takahashi
  • Patent number: 6815788
    Abstract: A transparent electrode is provided on a glass substrate, and an amorphous silicon layer is provided on the transparent electrode. A nickel layer as a metal catalyst element is provided in or so as to contact with the surface of the amorphous silicon layer, followed by heat treatment to crystallize the amorphous silicon layer, thereby forming a p-type polycrystalline silicon layer. This polycrystalline silicon layer is crystallographically oriented and has high crystallinity. The polycrystalline silicon layer is used as a seed crystal to form a p-type polycrystalline silicon layer which is crystallographically oriented and, at the same time, has high crystallinity. Further, an i-type polycrystalline silicon layer and an n-type polycrystalline silicon layer are successively formed on the polycrystalline silicon layer.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: November 9, 2004
    Assignee: Hitachi Cable Ltd.
    Inventors: Fumihito Oka, Shinichi Muramatsu, Yasushi Minagawa
  • Patent number: 6777714
    Abstract: Concave and convex are formed on the substrate 1, the amorphous silicon layer 4 is formed on the metallic catalyst 3 dispersed and arranged in a dotted shape in the concave portion of the concave and convex, the crystal phases 5 having respective orientations from the metallic catalyst 3 are grown, further the crystal phases 5 are integrated with each other by continuing heat treatment and the polycrystalline silicon layer 6 is formed. A crystalline silicon semiconductor device and its method for fabrication which are costly advantageous and capable of efficiently forming the polycrystalline silicon layer of a predetermined thickness needed as a semiconductor device are provided.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: August 17, 2004
    Assignee: Hitachi Cable, Ltd.
    Inventors: Shinichi Muramatsu, Yasushi Minagawa, Fumihito Oka, Susumu Takahashi, Yoshiaki Yazawa
  • Patent number: 6703289
    Abstract: A plurality of linear catalytic metal element portions are arranged at predetermined intervals just on or just beneath an amorphous silicon layer, and, in this state, the amorphous silicon layer is heat treated to crystallize the amorphous silicon layer and consequently to form a polycrystalline silicon layer. This construction can realize the provision of a method for the formation of an evenly oriented, high-quality crystalline silicon layer in a large area, and a crystalline silicon semiconductor device produced by this method.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: March 9, 2004
    Assignee: Hitachi Cable, Ltd.
    Inventors: Shinichi Muramatsu, Yasushi Minakawa, Fumihito Oka, Tadashi Sasaki
  • Publication number: 20030086572
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Application
    Filed: November 25, 2002
    Publication date: May 8, 2003
    Applicant: YAMAHA CORPORATION
    Inventors: Hiromi Sotome, Shigeo Ando, Shinichi Muramatsu, Akio Takahashi, Hiroshi Iriyama
  • Publication number: 20030053633
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Application
    Filed: August 30, 2002
    Publication date: March 20, 2003
    Applicant: YAMAHA CORPORATION
    Inventors: Hiromi Sotome, Shigeo Ando, Shinichi Muramatsu, Akio Takahashi
  • Publication number: 20030030052
    Abstract: A transparent electrode is provided on a glass substrate, and an amorphous silicon layer is provided on the transparent electrode. A nickel layer as a metal catalyst element is provided in or so as to contact with the surface of the amorphous silicon layer, followed by heat treatment to crystallize the amorphous silicon layer, thereby forming a p-type polycrystalline silicon layer. This polycrystalline silicon layer is crystallographically oriented and has high crystallinity. The polycrystalline silicon layer is used as a seed crystal to form a p-type polycrystalline silicon layer which is crystallographically oriented and, at the same time, has high crystallinity. Further, an i-type polycrystalline silicon layer and an n-type polycrystalline silicon layer are successively formed on the polycrystalline silicon layer.
    Type: Application
    Filed: August 10, 2001
    Publication date: February 13, 2003
    Inventors: Fumihito Oka, Shinichi Muramatsu, Yasushi Minagawa
  • Patent number: 6468841
    Abstract: At least a part of the surface of a crystalline silicon semiconductor substrate is rendered porous to convert at least a part of the crystalline silicon semiconductor substrate to a porous silicon layer. A catalytic metal layer is formed on the porous silicon layer. An amorphous silicon thin film is formed on the catalytic metal layer. The amorphous silicon thin film is heated to monocrystallize the amorphous silicon thin film, thereby converting the amorphous silicon thin film to a crystalline silicon thin film. The crystalline silicon semiconductor substrate, provided with the crystalline silicon thin film, is joined to a support substrate so that the crystalline silicon thin film faces the support substrate. The crystalline silicon semiconductor substrate, together with the porous silicon layer, which is the crystalline silicon semiconductor substrate in its portion converted to a porous layer, is separated and removed from the crystalline silicon thin film joined to the support substrate.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: October 22, 2002
    Assignee: Hitachi Cable, Ltd.
    Inventors: Shinichi Muramatsu, Harunori Sakaguchi, Susumu Takahashi