Patents by Inventor Shinichi Muramatsu

Shinichi Muramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020132455
    Abstract: A plurality of linear catalytic metal element portions are arranged at predetermined intervals just on or just beneath an amorphous silicon layer, and, in this state, the amorphous silicon layer is heat treated to crystallize the amorphous silicon layer and consequently to form a polycrystalline silicon layer. This construction can realize the provision of a method for the formation of an evenly oriented, high-quality crystalline silicon layer in a large area, and a crystalline silicon semiconductor device produced by this method.
    Type: Application
    Filed: December 10, 2001
    Publication date: September 19, 2002
    Inventors: Shinichi Muramatsu, Yasushi Minakawa, Fumihito Oka, Tadashi Sasaki
  • Publication number: 20020005519
    Abstract: Concave and convex are formed on the substrate 1, the amorphous silicon layer 4 is formed on the metallic catalyst 3 dispersed and arranged in a dotted shape in the concave portion of the concave and convex, the crystal phases 5 having respective orientations from the metallic catalyst 3 are grown, further the crystal phases 5 are integrated with each other by continuing heat treatment and the polycrystalline silicon layer 6 is formed. A crystalline silicon semiconductor device and its method for fabrication which are costly advantageous and capable of efficiently forming the polycrystalline silicon layer of a predetermined thickness needed as a semiconductor device are provided.
    Type: Application
    Filed: February 9, 2001
    Publication date: January 17, 2002
    Inventors: Shinichi Muramatsu, Yasushi Minagawa, Fumihito Oka, Susumu Takahashi, Yoshiaki Yazawa
  • Publication number: 20010039103
    Abstract: At least a part of the surface of a crystalline silicon semiconductor substrate is rendered porous to convert at least a part of the crystalline silicon semiconductor substrate to a porous silicon layer. A catalytic metal layer is formed on the porous silicon layer. An amorphous silicon thin film is formed on the catalytic metal layer. The amorphous silicon thin film is heated to monocrystallize the amorphous silicon thin film, thereby converting the amorphous silicon thin film to a crystalline silicon thin film. The crystalline silicon semiconductor substrate, provided with the crystalline silicon thin film is joined to a support substrate so that the crystalline silicon thin film faces the support substrate. The crystalline silicon semiconductor substrate, together with the porous silicon layer, which is the crystalline silicon semiconductor substrate in its portion converted to a porous layer, is separated and removed from the crystalline silicon thin film joined to the support substrate.
    Type: Application
    Filed: April 10, 2001
    Publication date: November 8, 2001
    Inventors: Shinichi Muramatsu, Harunori Sakaguchi, Susumu Takahashi
  • Publication number: 20010012367
    Abstract: A three-dimensional sound reproducing apparatus is configured by cascading a sound field effect adding unit and a crosstalk canceling unit. The sound field effect adding unit adds a predetermined three-dimensional sound field effect to an input audio signal, thereby generating audio signals respectively corresponding to left and right channels. The crosstalk canceling unit performs a calculation process on the audio signals of the two channels so that, when the audio signals are respectively generated by two loudspeakers positioned in front of a listener, the audio signals reach the left and right ears of the listener without producing crosstalk. The resulting audio signals are supplied to the loudspeakers, respectively.
    Type: Application
    Filed: June 19, 1997
    Publication date: August 9, 2001
    Applicant: YAMAHA CORPORATION
    Inventors: HIROMI SOTOME, SHIGEO ANDO, SHINICHI MURAMATSU, AKIO TAKAHASHI, HIROSHI IRIYAMA
  • Patent number: 5936348
    Abstract: In the electron multiplier assembly 27, a dynode unit 10 is constructed from a plurality of dynodes 9 laminated one on another. Each dynode 9 is formed with multichannels 12 which are separated from one another by channel-separating portions 14. A focusing electrode plate 16 is formed with multichannels 18 which are separated from one another by channel-separating electrodes 20 which are located in correspondence with the channel-separating portions 14 of the first stage dynode 9a. A plurality of anodes 7 are provided for receiving electrons multiplied at the dynode unit 10 in their corresponding channels 18. Each channel-separating electrode 20 is formed with an opening 21, at a position confronting the channel-separating portion 14 of the first stage dynode 9a, for transmitting electrons therethrough.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: August 10, 1999
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Hideki Shimoi, Hiroyuki Kyushima, Shinichi Muramatsu, Eiichiro Kawano
  • Patent number: 5886465
    Abstract: A photomultiplier tube of the present invention is the one which collects the electrons, which have been multiplied by the dynodes laminated into a plurality of stages in the electron multiplier section and that have subsequently been reflected at the final-stage dynode, as an output signal. The photomultiplier tube forms the final-stage dynode as multi-stage, for example, in two layers, and has its alkali metal vapor passage holes of its first layer so arranged as to have the holes shifted with respect to the alkali metal vapor passage holes of the second layer. Furthermore, each of the dynodes, except the final-stage dynode consists of the focusing mesh electrode, the coarse mesh electrode, and the spacer electrode and the reinforcing bars are formed at identical locations in the coarse mesh electrode and the spacer electrode. Secondary electron emission sections are provided in the vicinity regions of these reinforcing bars of the focusing mesh electrodes.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: March 23, 1999
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Shinichi Muramatsu, Fumihiro Takayama, Toyohiko Terada
  • Patent number: 5708842
    Abstract: A digital signal processing circuit, which is embodied by a digital signal processor (i.e., DSP), comprises at least an address counter and a coefficient RAM which is provided to store coefficients used for convolution processing to be performed. An overall storage area of the coefficient RAM exists between a first address and a last address. An external device provides control information including an initial count number and up/down information. The address counter counts a number of pulses included in a timing signal, which is produced in synchronism with bit clocks in a sampling period, so as to output a count number as a write address for the coefficient RAM. The address counter performs either an up-counting or a down-counting in accordance with the up/down information; and the count number thereof is increased or decreased from the initial count number. Hence, the coefficients sequentially inputted are written into the coefficient RAM at the respective write addresses.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: January 13, 1998
    Assignee: Yamaha Corporation
    Inventors: Yuji Ikegaya, Shinichi Muramatsu, Toru Shirayanagi
  • Patent number: 5636153
    Abstract: A digital signal processing circuit, which is configured by a digital signal processor (i.e., DSP), includes at least a data memory, a coefficient memory, a calculation portion and an interpolation portion. The data memory stores a plurality of digital data which are sequentially supplied thereto, while the coefficient memory stores a plurality of coefficients in connection with the plurality of digital data. The calculation portion performs a specific calculation (e.g., multiplication), using the coefficient, on the digital data. When a new coefficient is given with respect to one of the coefficients designated, the interpolation portion performs interpolation processing on the designated coefficient so as to successively shift it to the new coefficient. The coefficient successively shifted is stored in the coefficient memory. Hence, the calculation portion performs the calculation, using the coefficient successively shifted, on the digital data.
    Type: Grant
    Filed: October 19, 1994
    Date of Patent: June 3, 1997
    Assignee: Yamaha Corporation
    Inventors: Yuji Ikegaya, Shinichi Muramatsu, Toru Shirayanagi
  • Patent number: 5619579
    Abstract: A reverberation imparting apparatus comprises at least a data shift register, a coefficient shift register and an arithmetic convolution unit. The data shift register stores a string of sampling data each representative of an instantaneous value of an audio signal at each sampling period, while the coefficient shift register stores a string of coefficients which are created on the basis of waveforms of reflected sounds in response to an impulse sound artificially produced in a certain sound-field space such as a church. Normally, the data shift register successively stores new sampling data which are newly inputted thereto so that the contents of the data shift register is successively renewed. The arithmetic convolution unit performs an arithmetic convolution, using the string of coefficients on the string of sampling data.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: April 8, 1997
    Assignee: Yamaha Corporation
    Inventors: Shigeo Ando, Yuji Ikegaya, Shinichi Muramatsu
  • Patent number: 5294497
    Abstract: A battery box using a miniature-motor package comprising an upper part and a lower part, both of which have openings and can be joined together at the openings thereof to form a space for housing a miniature motor or other components, in which terminal mounts formed in such a manner that battery-connecting terminals, made of an electrically conductive material, are provided on the edges of the openings of the upper part and/or the lower part in such a manner as to face with each other, and a switch, made of an electrically conductive material, is rotatably provided near any one of the terminal mounts.
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: March 15, 1994
    Assignee: Mabuchi Motor Co., Ltd.
    Inventors: Shinichi Muramatsu, Hiromichi Kaneko, Shinichi Nakayama, Takeshi Akiyama
  • Patent number: 5163018
    Abstract: A digital signal processing circuit has a coefficient storing portion, a computing portion, a coefficient selection control portion and a coefficient transfer portion. The coefficient storing portion stores multiplier coefficients used for a convolution computation, in which a value of each multiplier coefficient can be arbitrarily changed. The computing portion stores a series of input data to be inputted thereto sequentially during certain period to be previously passed, so that the computing portion carries out the convolution computation on the series of input data by use of the multiplier coefficients. In addition, the coefficient selection control portion controls a selection of a data input/output manner, i.e., either a data first-in-first-out manner or a data circulation manner is selected. The coefficient transfer portion inputs the multiplier coefficients to the storing portion from a external device, or outputs the coefficients to the external device.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: November 10, 1992
    Assignee: Yamaha Corporation
    Inventors: Yuji Ikegaya, Shinichi Muramatsu, Yusuke Konagai
  • Patent number: 4963113
    Abstract: In a method of producing a photomultiplier tube comprising a vacuum container having an incident window, a photocathode formed on the inner surface of the incident window and an electron multiplier element spaced from the photocathode, a depositing mesh electrode on which a constituent for forming the photocathode has been deposited in advance is arranged between the photocathode and the electron multiplier element, and the constituent deposited on the depositing mesh electrode is deposited on the inner surface of said incident window, to form the photocathode.
    Type: Grant
    Filed: August 1, 1989
    Date of Patent: October 16, 1990
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Shinichi Muramatsu
  • Patent number: 4642412
    Abstract: A plurality of photovoltaic devices (e.g., solar cells) connect with each other and form a photo-electric conversion apparatus. The photovoltaic devices concerned are so connected with each other that when a given pattern of light is irradiated upon the photo-electric conversion apparatus concerned, the electrical output generated when the whole of it is irradiated is smaller than that generated when some parts of it are irradiated. Since an electronic system equipped with this apparatus as a power supply can be designed to work when the apparatus is irradiated with such a pattern of light that irradiates only a part of the apparatus, an electronic system having such an identifying faculty can be made easily.Further, an apparatus like this type may be made by connecting the elements of this apparatus in series or in reverse direction to form units, and by connecting this plurality of units in series and/or in parallel.
    Type: Grant
    Filed: July 29, 1985
    Date of Patent: February 10, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Muramatsu, Toshikazu Shimada, Sunao Matsubara, Haruo Itoh, Nobuo Nakamura
  • Patent number: 4553501
    Abstract: An apparatus for selectively plating on an elongated metal strip, at intervals of a predetermined length in the lengthwise direction, while the strip is being fed in the lengthwise direction. The apparatus includes: strip feeder which discharges the strip from a reel in a direction in which the strip is fed and a sensor for detecting the amount of slack in the strip. A pre-treating station treats the strip, before being plated, while it is continuously fed. A plating station intermittently feeds the strip and selectively plates it, while the strip is stopped during its intermittent movement. An after-treating station treats the strip by again continuously feeding the strip and a strip take-up section winds the strip onto a reel after it has been treated. Tension mechanisms are disposed between the continuous feeding station and the intermittent feeding station to impart a predetermined tensile force to the strip.
    Type: Grant
    Filed: March 14, 1984
    Date of Patent: November 19, 1985
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hiroshi Kobayashi, Shinichi Muramatsu, Yoshiro Ichikawa, Seizo Mitsui