Patents by Inventor Shinichi Uchida

Shinichi Uchida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12085707
    Abstract: A wide-angle optical system is a wide-angle optical system having a lens component, and includes in order from an object side, a first lens unit having a negative refractive power, a second lens unit having a negative refractive power, and a third lens unit having a positive refractive power. At the time of carrying out a focal-position adjustment from a far point to a near point, the second lens unit is moved from a first position toward a second position. The third lens unit includes not less than three lens components. Not less than three lens components include a first lens component and a second lens component. Each of the first lens component and the second lens component has a positive refractive power, and following conditional expression (1) is satisfied: 0.8<f3L12/fL<6.0??(1).
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: September 10, 2024
    Assignee: OLYMPUS CORPORATION
    Inventors: Keisuke Ichikawa, Takashi Fujikura, Shinichi Mihara, Yoshihiro Uchida
  • Patent number: 11901288
    Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor element, and a multilayer wiring. The semiconductor element is formed on the semiconductor substrate. The multilayer wiring includes a wiring electrically connected with the semiconductor element, and a first inductor. The multilayer wiring is formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element. The first inductor is formed such that the first inductor electrically isolated from the wiring and is magnetically connected with the wiring.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 13, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Iida, Yasutaka Nakashiba, Shinichi Uchida
  • Patent number: 11756881
    Abstract: A semiconductor device includes: a first substrate; a multilayer wiring layer formed on the first substrate; a first inductor formed into a meander shape on the multilayer wiring layer in a plan view; and a second inductor formed into a meander shape on the multilayer wiring layer in a plain view, and arranged so as to be close to the first inductor in a plan view and not to overlap with the first inductor. A transformer is configured by the first inductor and the second inductor and, in a plan view, the first inductor and the second inductor extend along a first direction in which one side of the first substrate extends.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: September 12, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Yasutaka Nakashiba, Shinichi Kuwabara
  • Patent number: 11296007
    Abstract: Provided is a thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: April 5, 2022
    Assignee: Dexerials Corporation
    Inventors: Hiroki Kanaya, Shinichi Uchida, Keisuke Aramaki
  • Publication number: 20220084902
    Abstract: Provided is a thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 17, 2022
    Inventors: Hiroki Kanaya, Shinichi Uchida, Keisuke Aramaki
  • Patent number: 11276640
    Abstract: A semiconductor device includes a plurality of first wires formed in a first layer, a plurality of second wires formed to intersect the plurality of first wires in a second layer stacked on the first layer, a plurality of first vias formed at intersections of the plurality of first wires and the plurality of second wires, and an inductor formed in a third layer stacked on the first layer and the second layer.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: March 15, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Shinichi Uchida
  • Publication number: 20220013457
    Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor element, and a multilayer wiring. The semiconductor element is formed on the semiconductor substrate. The multilayer wiring includes a wiring electrically connected with the semiconductor element, and a first inductor. The multilayer wiring is formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element. The first inductor is formed such that the first inductor electrically isolated from the wiring and is magnetically connected with the wiring.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 13, 2022
    Inventors: Tetsuya IIDA, Yasutaka NAKASHIBA, Shinichi UCHIDA
  • Publication number: 20210366827
    Abstract: A semiconductor device includes: a first substrate; a multilayer wiring layer formed on the first substrate; a first inductor formed into a meander shape on the multilayer wiring layer in a plan view; and a second inductor formed into a meander shape on the multilayer wiring layer in a plain view, and arranged so as to be close to the first inductor in a plan view and not to overlap with the first inductor. A transformer is configured by the first inductor and the second inductor and, in a plan view, the first inductor and the second inductor extend along a first direction in which one side of the first substrate extends.
    Type: Application
    Filed: April 15, 2021
    Publication date: November 25, 2021
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA, Shinichi KUWABARA
  • Patent number: 11024566
    Abstract: A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: June 1, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Akio Ono, Shinichi Kuwabara, Yasutaka Nakashiba
  • Publication number: 20210151394
    Abstract: The semiconductor device includes a first semiconductor substrate having a first surface and a second surface having a relationship with each other, a first circuit and electrically connected to the first circuit, and a first inductor formed at a position overlapping with the first semiconductor substrate, between the first surface and the first circuit, a first chip formed so as to cover the first surface, a second semiconductor substrate having a third surface and a fourth surface having a relationship with each other, a second circuit and electrically connected, and a second inductor formed so as to be electromagnetically coupled with the first inductor, the second surface, grooves are formed to reach the first insulating film, in a plan view, It is formed so as to surround the first circuit.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 20, 2021
    Inventors: Shinichi UCHIDA, Yasutaka NAKASHIBA
  • Patent number: 10991653
    Abstract: In a semiconductor device, a semiconductor substrate includes a bulk layer, a buried oxide layer provided in at least a partial region on the bulk layer, and a surface single crystal layer on the buried oxide layer. An inductor is provided above a main surface side of the semiconductor substrate on which the surface single crystal layer is disposed. To increase a Q value of the inductor, a ground shield is an impurity region formed in the bulk layer below the inductor and below the buried oxide layer.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: April 27, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Yasutaka Nakashiba
  • Patent number: 10818591
    Abstract: A method of manufacturing a semiconductor device includes a step of: patterning a conductive film formed over an interlayer insulating film so as to form a coil and a conductive pattern in the same layer, and then forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the coil and the conductive pattern as a mask.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: October 27, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Uchida, Yasutaka Nakashiba, Tetsuya Iida, Shinichi Kuwabara
  • Publication number: 20200251402
    Abstract: A thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein a mass ratio (insulating-coated carbon fibers/binder resin) of the insulating-coated carbon fibers to the binder resin is less than 1.30, and wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: Hiroki Kanaya, Shinichi Uchida, Shunsuke Uchida, Gupta Rishabh, Keisuke Aramaki
  • Patent number: 10734305
    Abstract: A thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein a mass ratio (insulating-coated carbon fibers/binder resin) of the insulating-coated carbon fibers to the binder resin is less than 1.30, and wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: August 4, 2020
    Assignee: DEXERIALS CORPORATION
    Inventors: Hiroki Kanaya, Shinichi Uchida, Shunsuke Uchida, Gupta Rishabh, Keisuke Aramaki
  • Publication number: 20200241128
    Abstract: A device control system comprises an object detection circuit configured to detect an object around a device to be controlled, an attribute identification circuit configured to identify an attribute of the device, and a control circuit configured to control the device based on a result of the detection by the object detection circuit and the attribute of the object identified by the attribute identification circuit. According to the above embodiment, it is possible to control the device without the user being aware of it.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 30, 2020
    Inventors: Shinichi UCHIDA, Nobuyuki MORIKOSHI, Tomoyuki TANAKA, Yoshiyuki OTA, Ryo YOKOTA, Yuji MOTODA
  • Patent number: 10672682
    Abstract: A thermal conducting sheet, including: a binder resin; insulating-coated carbon fibers; and a thermal conducting filler other than the insulating-coated carbon fibers, wherein a mass ratio (insulating-coated carbon fibers/binder resin) of the insulating-coated carbon fibers to the binder resin is less than 1.30, and wherein the insulating-coated carbon fibers include carbon fibers and a coating film over at least a part of a surface of the carbon fibers, the coating film being formed of a cured product of a polymerizable material.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: June 2, 2020
    Assignee: DEXERIALS CORPORATION
    Inventors: Hiroki Kanaya, Shinichi Uchida, Shunsuke Uchida, Gupta Rishabh, Keisuke Aramaki
  • Publication number: 20200168545
    Abstract: A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.
    Type: Application
    Filed: October 15, 2019
    Publication date: May 28, 2020
    Inventors: Shinichi UCHIDA, Akio ONO, Shinichi KUWABARA, Yasutaka NAKASHIBA
  • Patent number: 10629530
    Abstract: According to one embodiment, a semiconductor device 1 includes an Si substrate 11, an inductor 12 formed in wiring layers disposed above the Si substrate 11, and a shield 13 formed so as to surround the inductor 12, in which the shield 13 includes metals 105 to 109 formed in, among the wiring layers, a layer in which the inductor 12 is formed and a layer above that layer, and a silicide 104 formed between the Si substrate 11 and the wiring layers above the Si substrate 11.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: April 21, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Uchida, Keiichiro Tanaka, Takafumi Kuramoto
  • Publication number: 20200013716
    Abstract: A semiconductor device includes a plurality of first wires formed in a first layer, a plurality of second wires formed to intersect the plurality of first wires in a second layer stacked on the first layer, a plurality of first vias formed at intersections of the plurality of first wires and the plurality of second wires, and an inductor formed in a third layer stacked on the first layer and the second layer.
    Type: Application
    Filed: September 20, 2019
    Publication date: January 9, 2020
    Inventor: Shinichi Uchida
  • Patent number: 10526519
    Abstract: A thermal conducting sheet including: a binder resin; carbon fibers; and a thermal conducting filler other than the carbon fibers, wherein a mass ratio (carbon fibers/binder resin) of the carbon fibers to the binder resin is less than 1.30, wherein an amount of the thermal conducting filler is from 48% by volume through 70% by volume, and wherein the carbon fibers are oriented in a thickness direction of the thermal conducting sheet.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: January 7, 2020
    Assignee: Dexerials Corporation
    Inventors: Hiroki Kanaya, Yu Nomura, Shunsuke Uchida, Shinichi Uchida, Keisuke Aramaki