Abstract: A carbody of a railcar includes an underframe, a side bodyshell, and a roof bodyshell. At least one of the underframe, the side bodyshell, and the roof bodyshell includes: an outer plate portion facing a car outside; and a reinforced portion joined to an inside surface of the outer plate portion and forming at least one internal space between the reinforced portion and the outer plate portion. At least one sound absorbing hole communicating with the internal space is formed on the outer plate portion.

Abstract: An apparatus including: a first transmission processing unit that generates transmission signal sequences of multiple power layers that are to be multiplexed using power allocation; and a second transmission processing unit that processes a transmission signal sequence of a power layer using an interleaver, a scrambler, or a phase coefficient corresponding to the power layer for each of one or more of the multiple power layers. The apparatus improves accuracy of decoding of a desired signal when multiplexing/multiple access is performed using power allocation.

Abstract: A controlling device includes: controlling sections configured to control respective of a plurality of devices; and a master controlling section configured to determine, by referring to information obtained from one of the plurality of devices, a control matter concerning another one of the plurality of devices.

Abstract: There is provided a device including: an acquisition unit configured to acquire information on power allocation to a data signal serving as a target for multiplexing using power allocation; and a reporting unit configured to report the information on the power allocation to a terminal device.

Abstract: There is provided a communication control device including an acquisition unit configured to acquire a result of measurement by a terminal device, and a control unit configured to control switching of an operation mode of a base station of a small cell overlapping with a macro cell partially or wholly based on the result of the measurement. The switching is switching of the operation mode from one of a first mode and a second mode to the other. The first mode is a mode in which the base station can perform wireless communication with a device in the small cell, and the second mode is a mode that consumes less power than the first mode.

Abstract: An electric bicycle includes a battery, a high voltage electric wire extending from the battery, a motor driven by electricity supplied from the battery, and a reduction gear configured to reduce a speed of output of the motor. The battery is disposed in front of and above the motor. The reduction gear is disposed outside the motor in a vehicle width direction. The high voltage electric wire is disposed in a gap between the reduction gear and the battery in a forward/rearward direction at outer side of the motor in the vehicle width direction.

Abstract: There is provided a communication control device including an acquisition unit configured to acquire a result of measurement by a terminal device, and a control unit configured to control switching of an operation mode of a base station of a small cell overlapping with a macro cell partially or wholly based on the result of the measurement. The switching is switching of the operation mode from one of a first mode and a second mode to the other. The first mode is a mode in which the base station can perform wireless communication with a device in the small cell, and the second mode is a mode that consumes less power than the first mode.

Abstract: [Object] To allow an increase in load on the base station to be suppressed when the device-to-device communication is performed. [Solution] There is provided a terminal apparatus capable of communicating with a base station, the terminal apparatus including an acquisition unit that acquires radio resource information related to a radio resource usable for device-to-device communication not via the base station, of radio resources controllable by the base station, and a determination unit that determines a size of data to be transmitted and received in the device-to-device communication on the basis of the radio resource information.

Abstract: [Object] To allow an increase in load on the base station to be suppressed when the device-to-device communication is performed. [Solution] There is provided a terminal apparatus capable of communicating with a base station, the terminal apparatus including an acquisition unit that acquires radio resource information related to a radio resource usable for device-to-device communication not via the base station, of radio resources controllable by the base station, and a determination unit that determines a size of data to be transmitted and received in the device-to-device communication on the basis of the radio resource information.

Abstract: The present invention provides a composition comprising: honey; bee pollen; royal jelly; and propolis, wherein the content of the honey is 70% by mass or more and less than 100% by mass relative to the whole amount of the composition; the content of the bee pollen is more than 0% by mass and 10% by mass or less in terms of solid content relative to the whole amount of the composition; the content of the royal jelly is more than 0% by mass and 10% by mass or less in terms of solid content relative to the whole amount of the composition; and the content of the propolis is more than 0% by mass and 10% by mass or less in terms of solid content relative to the whole amount of the composition.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: In an SOI-MISFET that operates with low power consumption at a high speed, an element area is reduced. While a diffusion layer region of an N-conductivity type MISFET region of the SOI type MISFET and a diffusion layer region of a P-conductivity type MISFET region of the SOI type MISFET are formed as a common region, well diffusion layers that apply substrate potentials to the N-conductivity type MISFET region and the P-conductivity type MISFET region are separated from each other by an STI layer. The diffusion layer regions that are located in the N- and P-conductivity type MISFET regions) and serve as an output portion of a CMISFET are formed as a common region and directly connected by silicified metal so that the element area is reduced.

Abstract: A device and a method for manufacturing the same in which with device includes a single crystal semiconductor substrate and an SOI substrate separated from the single crystal semiconductor substrate by a thin buried insulating film and having a thin single crystal semiconductor thin film (SOI layer), in which well diffusion layer regions, drain regions, gate insulating films, and gate electrodes of the SOI-type MISFET and the bulk-type MISFET are formed in the same steps. The bulk-type MISFET and the SOI-type MISFET are formed on the same substrate, so that board area is reduced and a simple process can be realized by making manufacturing steps of the SOI-type MISFET and the bulk-type MISFET common.

Abstract: A non-volatile semiconductor memory device with good write/erase characteristics is provided. A selection gate is formed on a p-type well of a semiconductor substrate via a gate insulator, and a memory gate is formed on the p-type well via a laminated film composed of a silicon oxide film, a silicon nitride film, and a silicon oxide film. The memory gate is adjacent to the selection gate via the laminated film. In the regions on both sides of the selection gate and the memory gate in the p-type well, n-type impurity diffusion layers serving as the source and drain are formed. The region controlled by the selection gate and the region controlled by the memory gate located in the channel region between said impurity diffusion layers have the different charge densities of the impurity from each other.

Abstract: An operation scheme for operating stably a semiconductor nonvolatile memory device is provided. When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate structure, the hot-hole injection is verified using a crossing point that does not change with time. Thus, an erased state can be verified without being aware of any time-varying changes. Also, programming or programming/erasure is conducted by repeating pulse voltage or multi-step voltage application to a gate section multiple times.

Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.