Patents by Inventor Shinji Fukumoto

Shinji Fukumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200165431
    Abstract: There is provided a thermoplastic resin composition for coating, in which excellent coating adhesion strength can be exhibited even when high-speed molding is performed, a coating appearance hardly changes in a thermal cycle, a resin molded article excellent in impact resistance is obtained, and fluidity during a molding process is also excellent, and a resin molded article and a coated article using the same. The thermoplastic resin composition for coating includes a rubber-containing graft copolymer mixture (A) including two or more kinds of rubber-containing graft copolymers obtained by copolymerizing a predetermined monomer mixture in presence of a diene rubbery polymer; and a rigid copolymer (B) in a predetermined content, in which a graft copolymer mixture (A) includes a rubber-containing graft copolymer (A-I) in which the mass average particle size of a rubbery polymer is 0.15 ?m or larger and smaller than 0.25 ?m, and a proportion of particles having particle sizes of larger than 0.122 ?m and 0.
    Type: Application
    Filed: July 20, 2018
    Publication date: May 28, 2020
    Inventors: Shinji Yamashita, Hiroshi Sakai, Kotaro Fukumoto
  • Patent number: 9807889
    Abstract: An method of mounting electronic component includes: providing a connecting layer between a wiring and an electronic component, the connecting layer including a conductive layer formed of a solder powder-containing resin composition containing thermosetting resin, solder powder, and a reducing agent and one or two layers of a thermoplastic resin layer formed of thermoplastic resin; and electrically connecting the electronic component to the wiring through the connecting layer.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: October 31, 2017
    Assignees: OSAKA UNIVERSITY, SENJU METAL INDUSTRY CO., LTD.
    Inventors: Kozo Fujimoto, Shinji Fukumoto, Michiya Matsushima, Satoshi Watanabe, Takeshi Kan, Minoru Ueshima, Takeshi Sakamoto, Shu Inoue
  • Patent number: 9347919
    Abstract: The present invention provides a method and apparatus for rapidly extracting the analyte existing in the liquid phase in analyzing an analyte “having a large partition coefficient in gas-liquid equilibrium”, “having a high water solubility”, or “having a low olfactory threshold” by a gas-liquid contact extraction method, and further provides, a method and apparatus for unmanned continuous sample introduction of the analyte to a GC or the like for a long time. In the present invention, using a gas-liquid contact extractor to which a sample liquid is continuously introduced from above and a purge gas from beneath, the analyte in the sample liquid is extracted by gas-liquid contact between the sample liquid and the purge gas. A discharge pipe is connected to the bottom of the gas-liquid contact extractor, the pipe having a liquid sump through which the sample liquid is discharged, while blocking the outflow of the purge gas from the liquid sump.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: May 24, 2016
    Assignees: Shimadzu Corporation, GL Sciences Incorporated
    Inventors: Shinji Fukumoto, Hiroshi Yamauchi, Akira Aono, Manabu Shimomura, Yoshiyuki Takei, Tadashi Mimura, Akira Suzuki, Masahiro Furuno
  • Patent number: 9248387
    Abstract: A filter cleaning apparatus used in a reaction system including; a reaction tank having a filter, first feed line connected to the filter at one end, a recovery tank connected to the other end of the first feed line, and second feed line connected to the recovery tank at one end, is provided. The filter cleaning apparatus includes; first return line connected the second feed line at one end, first and second reverse cleaning solution tanks connected to the first return line, a first flow rate adjusting valve that can adjust filtered fluid to be supplied to the first reverse cleaning solution tank, a second flow rate adjusting valve that can adjust filtered fluid to be supplied to the second reverse cleaning solution tank, and a switching section that carries either one of the filtered fluids accommodated in these reverse cleaning solution tanks by switching.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: February 2, 2016
    Assignees: Japan Oil, Gas and Metals National Corporation, INPEX CORPORATION, JX Nippon Oil & Energy Corporation, Japan Petroleum Exploration Co., Ltd., COSMO OIL CO., LTD., NIPPON STEEL & SUMIKIN ENGINEERING CO., LTD.
    Inventors: Atsushi Murata, Eiichi Yamada, Shinji Fukumoto
  • Publication number: 20140326045
    Abstract: The present invention provides a method and apparatus for rapidly extracting the analyte existing in the liquid phase in analyzing an analyse “having a large partition coefficient in gas-liquid equilibrium”, “having a high water solubility”, or “having a low olfactory threshold” by a gas-liquid contact extraction method, and further provides, a method and apparatus for unmanned continuous sample introduction of the analyte to a GC or the like for a long time. In the present invention, using a gas-liquid contact extractor to which a sample liquid is continuously introduced from above and a purge gas from beneath, the analyte in the sample liquid is extracted by gas-liquid contact between the sample liquid and the purge gas. A discharge pipe is connected to the bottom of the gas-liquid contact extractor, the pipe having a liquid sump through which the sample liquid is discharged, while blocking the outflow of the purge gas from the liquid sump.
    Type: Application
    Filed: November 16, 2012
    Publication date: November 6, 2014
    Inventors: Shinji Fukumoto, Hiroshi Yamauchi, Akira Aono, Manabu Shimomura, Yoshiyuki Takei, Tadashi Mimura, Akira Suzuki, Masahiro Furuno
  • Publication number: 20140183124
    Abstract: A filter cleaning apparatus used in a reaction system including; a reaction tank having a filter, first feed line connected to the filter at one end, a recovery tank connected to the other end of the first feed line, and second feed line connected to the recovery tank at one end, is provided. The filter cleaning apparatus includes; first return line connected the second feed line at one end, first and second reverse cleaning solution tanks connected to the first return line, a first flow rate adjusting valve that can adjust filtered fluid to be supplied to the first reverse cleaning solution tank, a second flow rate adjusting valve that can adjust filtered fluid to be supplied to the second reverse cleaning solution tank, and a switching section that carries either one of the filtered fluids accommodated in these reverse cleaning solution tanks by switching.
    Type: Application
    Filed: August 2, 2012
    Publication date: July 3, 2014
    Applicants: JAPAN OIL, GAS AND METALS NATIONAL CORPORATION, INPEX CORPORATION, NIPPON STEEL & SUMIKIN ENGINEERING CO., LTD., JAPAN PETROLEUM EXPLORATION CO., LTD., COSMO OIL CO., LTD., JX NIPPON OIL & ENERGY CORPORATION
    Inventors: Atsushi Murata, Eiichi Yamada, Shinji Fukumoto
  • Publication number: 20140029224
    Abstract: An method of mounting electronic component includes: providing a connecting layer between a wiring and an electronic component, the connecting layer including a conductive layer formed of a solder powder-containing resin composition containing thermosetting resin, solder powder, and a reducing agent and one or two layers of a thermoplastic resin layer formed of thermoplastic resin; and electrically connecting the electronic component to the wiring through the connecting layer.
    Type: Application
    Filed: July 29, 2013
    Publication date: January 30, 2014
    Applicants: SENJU METAL INDUSTRY CO., LTD., OSAKA UNIVERSITY
    Inventors: Kozo FUJIMOTO, Shinji FUKUMOTO, Michiya MATSUSHIMA, Satoshi WATANABE, Takeshi KAN, Minoru UESHIMA, Takeshi SAKAMOTO, Shu INOUE
  • Patent number: 8098836
    Abstract: When the frequency of an engine rotation signal reaches a predetermined frequency, a comparator of a switching unit outputs a switching control signal to selectors and a filter coefficient updater. Based on the switching control signal, the selector switches from a connection between one memory and a corrector to a connection between another memory and the corrector, thereby changing the transfer characteristics C^rr of the corrector from C^11 to C^10. Based on the switching control signal, the selector switches from a connection between one ADC and a filter coefficient updater to the connection between another ADC and the filter coefficient updater, thereby supplying the filter coefficient updater with an error signal, rather than an error signal.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: January 17, 2012
    Assignees: Honda Motor Co., Ltd., Pioneer Corporation
    Inventors: Kosuke Sakamoto, Toshio Inoue, Akira Takahashi, Yasunori Kobayashi, Kenji Yamagata, Shinji Fukumoto
  • Patent number: 8051678
    Abstract: The present invention relates to a glass substrate of which the outer periphery portion is unprocessed. The present invention also relates to a manufacturing method for a glass substrate of which the outer periphery portion is unprocessed, characterized in that a first lapping process, a second lapping process, a polishing process and a washing process are carried out after a press molding process is carried out so as to compress glass between an upper mold and a lower mold without regulating the edge surface of the outer periphery portion of the glass and, then, a crystallization process or an annealing process is carried out.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: November 8, 2011
    Assignee: Minolta Co., Ltd.
    Inventors: Shiro Nishimoto, Mitsugu Tokunaga, Hideki Kawai, Toshiharu Mori, Shinji Fukumoto
  • Patent number: 7636004
    Abstract: The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: December 22, 2009
    Assignee: Panasonic Corporation
    Inventors: Tadayoshi Nakatsuka, Katsushi Tara, Shinji Fukumoto
  • Publication number: 20080240456
    Abstract: A control characteristics changing unit reads, from an EEPROM, various control parameters in an ANC electronic controller, which correspond to specification information acquired from ECUs. The control characteristics changing unit then outputs control parameters, depending on changed specification information among the read control parameters, as change signals Sm1 through Sm6 to a basic signal generating unit, reference signal generating units, filter coefficient updating units, corrective signal generating units, switches, and variable-gain amplifiers, respectively.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicants: HONDA MOTOR CO., LTD., PIONEER CORPORATION
    Inventors: Kosuke Sakamoto, Toshio Inoue, Akira Takahashi, Yasunori Kobayashi, Kenji Yamagata, Shinji Fukumoto, Noriyuki Hirasawa, Koji Suzuki
  • Publication number: 20080152158
    Abstract: When the frequency of an engine rotation signal reaches a predetermined frequency, a comparator of a switching unit outputs a switching control signal to selectors and a filter coefficient updater. Based on the switching control signal, the selector switches from a connection between one memory and a corrector to a connection between another memory and the corrector, thereby changing the transfer characteristics C?rr of the corrector from C?11 to C?10. Based on the switching control signal, the selector switches from a connection between one ADC and a filter coefficient updater to the connection between another ADC and the filter coefficient updater, thereby supplying the filter coefficient updater with an error signal, rather than an error signal.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 26, 2008
    Inventors: Kosuke Sakamoto, Toshio Inoue, Akira Takahashi, Yasunori Kobayashi, Kenji Yamagata, Shinji Fukumoto
  • Patent number: 7286001
    Abstract: The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: October 23, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadayoshi Nakatsuka, Katsushi Tara, Shinji Fukumoto
  • Publication number: 20070139094
    Abstract: The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.
    Type: Application
    Filed: February 7, 2007
    Publication date: June 21, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tadayoshi Nakatsuka, Katsushi Tara, Shinji Fukumoto
  • Patent number: 7221207
    Abstract: A semiconductor apparatus is provided which makes it possible to reduce the number of control terminals required for switching through paths of a high frequency signal, simplify the circuit configuration for controlling the terminals, improve an isolation characteristic between on path and off path of a through FET, and obtain a sufficiently high isolation. In this semiconductor apparatus, one specific through FET and each of shunt FETs connected to each of through FETs other than the one specific through FET are simultaneously turned on in response to the same control signal inputted to the same control terminal. Thus, when a high frequency signal leaks from an output terminal to the signal path of the through FET having been turned on, through the signal paths of the through FETs having been turned off, the high frequency signal can be released to GND through the shunt FET having been turned on.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: May 22, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Fukumoto, Katsushi Tara, Tadayoshi Nakatsuka, Tomohiko Nakamura
  • Publication number: 20070102730
    Abstract: An RF switching circuit according to the present invention includes: a plurality of input/output terminals for inputting and outputting an RF signal; and a switch for opening and closing an electrical connection between the input/output terminals. The switch is constituted by a multi-gate field effect transistor including a plurality of gates located between source and drain spaced from each other on a semiconductor layer. A bias voltage is applied to an inter-gate region of the semiconductor layer between the gates. The bias voltage is equal to or lower than 90% of a high-level voltage, which is a voltage for turning the multi-gate field effect transistor ON, in a state where the multi-gate field effect transistor is ON, and is equal to or higher than 80% of the high-level voltage and equal to or lower than the high-level voltage in a state where the multi-gate field effect transistor is OFF.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 10, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadayoshi Nakatsuka, Shinji Fukumoto
  • Patent number: 7199635
    Abstract: The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: April 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadayoshi Nakatsuka, Katsushi Tara, Shinji Fukumoto
  • Patent number: 7161197
    Abstract: An RF switching circuit according to the present invention includes: a plurality of input/output terminals for inputting and outputting an RF signal; and a switch for opening and closing an electrical connection between the input/output terminals. The switch is constituted by a multi-gate field effect transistor including a plurality of gates located between source and drain spaced from each other on a semiconductor layer. A bias voltage is applied to an inter-gate region of the semiconductor layer between the gates. The bias voltage is equal to or lower than 90% of a high-level voltage, which is a voltage for turning the multi-gate field effect transistor ON, in a state where the multi-gate field effect transistor is ON, and is equal to or higher than 80% of the high-level voltage and equal to or lower than the high-level voltage in a state where the multi-gate field effect transistor is OFF.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: January 9, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadayoshi Nakatsuka, Shinji Fukumoto
  • Publication number: 20060181328
    Abstract: The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.
    Type: Application
    Filed: April 13, 2006
    Publication date: August 17, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tadayoshi Nakatsuka, Katsushi Tara, Shinji Fukumoto
  • Patent number: 7079860
    Abstract: A first low noise amplifier (LNA1 111) is provided with a control terminal (1115) for turning of/off the low noise amplifier (LNA1 111). Power terminals of the low noise amplifier (LNA1 111) and a second low noise amplifier (LNA2 112) are commonly connected, and are connected to a power supply (10) via a power supply switch (1114). Ground terminals of the two amplifiers (LNA1 111) and (LNA2 112) are commonly connected, and a constant current source (1 115) is connected between the common terminal and the ground. The amplifiers (LNA1 111) and (LNA2 112) are turned on/off by switching the voltage applied to the control terminal (1115) of the first low noise amplifier (LNA1 111) between a high potential and a low potential. The power supply switch (1114) is turned off during signal transmission. Therefore, an LNA block can be provided by using only one power supply switch (1114), whereby it is possible to reduce the number of devices from that in the prior art, thereby realizing a reduction in the size thereof.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: July 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Yamamoto, Kaname Motoyoshi, Shinji Fukumoto, Kenichi Hidaka, Atsushi Watanabe