Patents by Inventor Shinji Ohno
Shinji Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11437965Abstract: A variable gain amplifier according to an embodiment comprises a first path, a matching circuit, an amplifier circuit, a second path, and a third path. The first path includes an attenuation circuit, has one end connected to a first input terminal, and attenuates an input signal and outputs an attenuated signal. The matching circuit has one end connected to the other end of the first path. The amplifier circuit has an input connected to the other end of the matching circuit and an output connected to a first output terminal, and amplifies an input signal. The second path is connected in parallel to the first path. The third path has one end connected to the first input terminal, and the other end connected to the first output terminal.Type: GrantFiled: September 11, 2020Date of Patent: September 6, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Shinji Ohno, Toshifumi Ishimori
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Publication number: 20210297049Abstract: A variable gain amplifier according to an embodiment comprises a first path, a matching circuit, an amplifier circuit, a second path, and a third path. The first path includes an attenuation circuit, has one end connected to a first input terminal, and attenuates an input signal and outputs an attenuated signal. The matching circuit has one end connected to the other end of the first path. The amplifier circuit has an input connected to the other end of the matching circuit and an output connected to a first output terminal, and amplifies an input signal. The second path is connected in parallel to the first path. The third path has one end connected to the first input terminal, and the other end connected to the first output terminal.Type: ApplicationFiled: September 11, 2020Publication date: September 23, 2021Inventors: Shinji OHNO, Toshifumi Ishimori
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Patent number: 10872982Abstract: A transistor excellent in electrical characteristics and a method for manufacturing the transistor are provided. The transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel formation region over an insulating surface; a gate insulating film over the oxide semiconductor layer; a gate electrode overlapping with the channel formation region, over the gate insulating film; a source electrode in contact with the source region; and a drain electrode in contact with the drain region. The source region and the drain region include a portion having higher oxygen concentration than the channel formation region.Type: GrantFiled: February 17, 2016Date of Patent: December 22, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinji Ohno, Hirokazu Watanabe, Naoto Kusumoto
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Patent number: 10833202Abstract: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.Type: GrantFiled: November 30, 2017Date of Patent: November 10, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Shunpei Yamazaki
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Patent number: 10778221Abstract: According to one embodiment, a first switch controls conduction between first and second nodes according to a potential on a first control node. A second switch controls conduction between the first control node and a first potential node according to a potential on a second control node. A first circuit includes first and second output nodes respectively coupled to the first and second control nodes, and outputs at the second output node a potential that brings the second switch out of conduction while outputting a first potential at the first output node. The first circuit has a high impedance at the first output node while outputting at the second output node a potential that brings the second switch into conduction.Type: GrantFiled: June 6, 2019Date of Patent: September 15, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronics Devices & Storage CorporationInventors: Shinji Ohno, Toshifumi Ishimori, Mitsuru Sugawara
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Publication number: 20200228117Abstract: According to one embodiment, a first switch controls conduction between first and second nodes according to a potential on a first control node. A second switch controls conduction between the first control node and a first potential node according to a potential on a second control node. A first circuit includes first and second output nodes respectively coupled to the first and second control nodes, and outputs at the second output node a potential that brings the second switch out of conduction while outputting a first potential at the first output node. The first circuit has a high impedance at the first output node while outputting at the second output node a potential that brings the second switch into conduction.Type: ApplicationFiled: June 6, 2019Publication date: July 16, 2020Inventors: Shinji Ohno, Toshifumi Ishimori, Mitsuru Sugawara
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Patent number: 10109743Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.Type: GrantFiled: June 9, 2016Date of Patent: October 23, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Patent number: 10008587Abstract: A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.Type: GrantFiled: August 14, 2014Date of Patent: June 26, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Atsuo Isobe, Toshihiko Saito, Takehisa Hatano, Hideomi Suzawa, Shinya Sasagawa, Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Publication number: 20180145180Abstract: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.Type: ApplicationFiled: November 30, 2017Publication date: May 24, 2018Inventors: Junichi KOEZUKA, Shinji OHNO, Yuichi SATO, Shunpei YAMAZAKI
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Patent number: 9837545Abstract: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.Type: GrantFiled: February 16, 2016Date of Patent: December 5, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Shunpei Yamazaki
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Patent number: 9646829Abstract: A method for manufacturing a highly reliable semiconductor device with less change in threshold voltage is provided. An insulating film from which oxygen can be released by heating is formed in contact with an oxide semiconductor layer, and light irradiation treatment is performed on a gate electrode or a metal layer formed in a region which overlaps with the gate electrode, so that oxygen is added into the oxide semiconductor layer in a region which overlaps with the gate electrode. Accordingly, oxygen vacancies or interface states in the oxide semiconductor layer in a region which overlaps with the gate electrode can be reduced.Type: GrantFiled: February 23, 2012Date of Patent: May 9, 2017Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shinji Ohno, Yuichi Sato, Junichi Koezuka
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Publication number: 20170110586Abstract: An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer is formed to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween, a first insulating layer is formed to cover the gate insulating layer and the gate electrode layer, an impurity element is introduced through the insulating layer to form a pair of impurity regions in the oxide semiconductor layer, a second insulating layer is formed over the first insulating layer, the first insulating layer and the second insulating layer are anisotropically etched to form a sidewall insulating layer in contact with a side surface of the gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the pair of impurity regions are formed.Type: ApplicationFiled: December 29, 2016Publication date: April 20, 2017Inventors: Atsuo ISOBE, Sachiaki TEZUKA, Shinji OHNO
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Patent number: 9553200Abstract: An oxide semiconductor layer is formed, a gate insulating layer is formed over the oxide semiconductor layer, a gate electrode layer is formed to overlap with the oxide semiconductor layer with the gate insulating layer interposed therebetween, a first insulating layer is formed to cover the gate insulating layer and the gate electrode layer, an impurity element is introduced through the insulating layer to form a pair of impurity regions in the oxide semiconductor layer, a second insulating layer is formed over the first insulating layer, the first insulating layer and the second insulating layer are anisotropically etched to form a sidewall insulating layer in contact with a side surface of the gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the pair of impurity regions are formed.Type: GrantFiled: February 26, 2013Date of Patent: January 24, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Atsuo Isobe, Sachiaki Tezuka, Shinji Ohno
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Publication number: 20160284864Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.Type: ApplicationFiled: June 9, 2016Publication date: September 29, 2016Inventors: Junichi KOEZUKA, Yuichi SATO, Shinji OHNO
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Patent number: 9450104Abstract: The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.Type: GrantFiled: October 22, 2015Date of Patent: September 20, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Masahiro Takahashi, Hideyuki Kishida
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Patent number: 9379223Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.Type: GrantFiled: December 15, 2014Date of Patent: June 28, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Publication number: 20160163880Abstract: A transistor excellent in electrical characteristics and a method for manufacturing the transistor are provided. The transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel formation region over an insulating surface; a gate insulating film over the oxide semiconductor layer; a gate electrode overlapping with the channel formation region, over the gate insulating film; a source electrode in contact with the source region; and a drain electrode in contact with the drain region. The source region and the drain region include a portion having higher oxygen concentration than the channel formation region.Type: ApplicationFiled: February 17, 2016Publication date: June 9, 2016Inventors: Shinji OHNO, Hirokazu WATANABE, Naoto KUSUMOTO
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Publication number: 20160163873Abstract: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.Type: ApplicationFiled: February 16, 2016Publication date: June 9, 2016Inventors: Junichi KOEZUKA, Shinji OHNO, Yuichi SATO, Shunpei YAMAZAKI
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Patent number: 9299852Abstract: A miniaturized semiconductor device in which an increase in power consumption is suppressed and a method for manufacturing the semiconductor device are provided. A highly reliable semiconductor device having stable electric characteristics and a method for manufacturing the semiconductor device are provided. An oxide semiconductor film is irradiated with ions accelerated by an electric field in order to reduce the average surface roughness of a surface of the oxide semiconductor film. Consequently, an increase in the leakage current and power consumption of a transistor can be suppressed. Moreover, by performing heat treatment so that the oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to the surface of the oxide semiconductor film, a change in electric characteristics of the oxide semiconductor film due to irradiation with visible light or ultraviolet light can be suppressed.Type: GrantFiled: May 30, 2012Date of Patent: March 29, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kyoko Yoshioka, Junichi Koezuka, Shinji Ohno, Yuichi Sato, Shinya Sasagawa
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Patent number: 9287407Abstract: A transistor using an oxide semiconductor, which has good on-state characteristics is provided. A high-performance semiconductor device including the transistor capable of high-speed response and high-speed operation is provided. The transistor includes the oxide semiconductor film including a channel formation region and low-resistance regions in which a metal element and a dopant are included. The channel formation region is positioned between the low-resistance regions in the channel length direction. In a manufacturing method of the transistor, the metal element is added by heat treatment performed in the state where the oxide semiconductor film is in contact with a film including the metal element and the dopant is added through the film including the metal element by an implantation method so that the low resistance regions in which a metal element and a dopant are included are formed.Type: GrantFiled: May 31, 2012Date of Patent: March 15, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Shunpei Yamazaki