Patents by Inventor Shinji Shimizu
Shinji Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020047348Abstract: The magnetic pole position detector for an electric motor comprises a detection rotor, a detection stator, and magnetic flux concentration tips and magneto electro transducers. The detection rotor is fixed to an axis of rotation of the motor and comprised of disc-like rotors having first toothlike protrusions and a permanent magnet. The disc-like rotors are assembled so as to make the first toothlike protrusions coincide in the axial direction and the permanent magnet is fixed between the disc-like rotors. The detection stator is comprised of stator cores comprised of an annular yoke and stator teeth formed at regular intervals on the former. Second toothlike protrusions are formed on the inner end of the stator teeth. The stator cores are assembled with a gap in the axial direction so as to make respective second toothlike protrusions coincide in the axial direction. The magnetic flux concentration tips and the magneto electro transducers are placed in the gaps in the axial direction.Type: ApplicationFiled: May 22, 2001Publication date: April 25, 2002Inventors: Shoji Ohiwa, Kazuo Ohnishi, Atushi Yamamoto, Shinji Shimizu, Youji Unoki, Yukinori Kurita
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Publication number: 20020028574Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.Type: ApplicationFiled: July 27, 2001Publication date: March 7, 2002Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
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Patent number: 6352762Abstract: An easily adhesive polyamide film has been created from unstretched or uniaxially stretched non-heated polyamide film coated with a water-base coating mixture, whose main constituents are (A) water polyurethane resin containing acetylene glycol in which each carbon atom immediately adjacent to the triple-bonded carbon atom is replaced with a hydroxyl group and a methyl group, and/or an ethylene oxide addition product of the acetylene glycol; (B) a water-soluble polyepoxy compound; and (C) particles with an average diameter between 0.001 and 1.0 &mgr;m, of which the solid-content weight ratio is 98-30/2-70/0.1-10, the coating amount after stretching is between 0.005 and 0.030 g/m2, and the film is stretched in at least one direction and then heated. This newly invented film possesses good blocking resistance and excellent adhesiveness with print ink, laminate, and other coating mixtures, and is especially suitable for boiling sterilization, retort sterilization, and packaging of liquids.Type: GrantFiled: February 24, 1999Date of Patent: March 5, 2002Assignee: Kohjin Co., Ltd.Inventors: Shinji Shimizu, Masahiro Yanagida, Makio Tominaga, Makoto Ichiki
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Patent number: 6284174Abstract: A melt spinning pack, including a pack case, a spinneret having many spinning holes positioned at the bottom of the case, a pack cap having a polymer introducing hole at the center positioned at the top of the case, and a flow arranging plate having many flow arranging holes with restricted portions reduced in cross sectional area compared to the inlets of the holes positioned between the spinneret and the pack cap, satisfying the requirement that the contraction percentage R be 50% or less, respectively contained in the case.Type: GrantFiled: December 6, 1999Date of Patent: September 4, 2001Assignee: Toray Industries, Inc.Inventors: Kunihiko Ueda, Toshio Nishitani, Hiroki Furuta, Teruaki Saijo, Kanji Saito, Hiroshi Kato, Hiroshi Ohtani, Shinji Shimizu, Koji Hashimoto
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Patent number: 6281071Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it.Type: GrantFiled: May 25, 1999Date of Patent: August 28, 2001Assignee: Hiatchi, Ltd.Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
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Patent number: 6218073Abstract: A heat-sensitive composition is disclosed which includes a substance which absorbs light and generates heat, an anionic self water-dispersible resin particle having an acid value of 10 to 300 and an average particle diameter of 0.005 to 15 &mgr;m, and a fluorine base surfactant. An original plate for a lithographic printing plate is disclosed which includes an ordinary negative- or positive-type PS plate having coated thereon the heat-sensitive composition. The original plate is image-wise exposed with high energy density light based on digital image information from a computer, subjected to first development with an aqueous alkali solution, flood exposure with active light, a second development with a developer for a negative or a positive, and post-treatment to obtain a printing plate.Type: GrantFiled: March 18, 1999Date of Patent: April 17, 2001Assignee: Dainippon Ink and Chemicals, Inc.Inventors: Shinji Shimizu, Yasuyuki Watanabe, Yasuhiko Kojima, Koji Oe, Nansei Tasiro
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Patent number: 6007376Abstract: A circuit board electrical connector for a circuit board having an attachment opening, which comprises a housing; an attachment leg having a metallic surface and projecting downwardly from the housing into the attachment opening; and a solder retention area in the attachment leg so that solder flows into an upper portion of the attaching opening.Type: GrantFiled: April 16, 1998Date of Patent: December 28, 1999Assignee: Hirose Electric Co., Ltd.Inventor: Shinji Shimizu
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Patent number: 5930624Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry.Type: GrantFiled: January 26, 1998Date of Patent: July 27, 1999Assignee: Hitachi, Ltd.Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
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Patent number: 5870492Abstract: An inscribed character is recognized with a device including a memory for storing signals representing the shapes of plural inscribed characters, a sensor for the shapes of inscribed characters, a comparator for the stored signals and signals from the sensor, and a display. The comparator compares a signal representing the sensed shape of the inscribed character and the stored signals representing the shapes of plural characters likely to be inscribed to derive signals representing plural selected candidate characters similar in shape to the inscribed character. In response to the signals representing plural selected candidate characters similar in shape to the inscribed character the plural candidate characters are displayed on a first region of the display abutting a second region where there is a representation of the inscribed character.Type: GrantFiled: June 4, 1992Date of Patent: February 9, 1999Assignee: Wacom Co., Ltd.Inventors: Shinji Shimizu, Masao Kumagishi
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Patent number: 5835135Abstract: A measuring device for measuring a glow center of a display device is provided with: an image pickup device which includes a sensing surface defined by a plurality of photoelectric conversion elements arranged in a two-dimensional manner at a specified pitch and picks up a light image to produce image data; an optical system which transmits a light image displayed on a display device to the sensing surface of the image pickup device; an optical system controller which controls the optical system to transmit the light image to the sensing surface in such a manner that the maximum spatial frequency of the light image at the sensing surface of the image pickup device is smaller than the reciprocal of the pitch of the photoelectric conversion element arrangement; and a calculator which calculates a glow center of the light image on the display device based on image data produced by the image pickup device.Type: GrantFiled: March 4, 1996Date of Patent: November 10, 1998Assignee: Minolta Co., Ltd.Inventors: Kenji Hamaguri, Shinji Shimizu
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Patent number: 5774578Abstract: Even if various types of images exist together in an objective image, it is possible to sufficiently improve the quality of the image at all areas which are to be corrected. An image-correction apparatus has such a structure in which a CPU (10), an image-correction procedure part (12), a color monitor (14), a key board (16), a mouse (18), an inputting device (20), an image memory (22), an image-correction method memory (24), an outputting device (26) and the like are connected to a main bus (50). First, the CPU (10) instructs the inputting device (20) to read the objective image and store resultant data in the image memory (22), and instructs the color monitor (14) to display the objective image, using the image data which are stored. An operator then designate areas to be corrected, and selects a image-correction method which is suitable to the area from four types of image-correction methods, i.e.Type: GrantFiled: March 18, 1996Date of Patent: June 30, 1998Assignee: Dainippon Screen Mfg. Co., Ltd.Inventor: Shinji Shimizu
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Patent number: 5753550Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. In a first aspect, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry.Type: GrantFiled: March 25, 1996Date of Patent: May 19, 1998Assignee: Hitachi, Ltd.Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
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Patent number: 5504029Abstract: A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, is disclosed. The impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. The Y-select signal line overlaps the lower electrode layer of the capacitor element. A potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected, is formed by diffusion of an impurity for a channel stopper region. The dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. The capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure.Type: GrantFiled: June 6, 1994Date of Patent: April 2, 1996Assignee: Hitachi, Ltd.Inventors: Jun Murata, Yoshitaka Tadaki, Isamu Asano, Mitsuaki Horiuchi, Jun Sugiura, Hiroko Kaneko, Shinji Shimizu, Atsushi Hiraiwa, Hidetsugu Ogishi, Masakazu Sagawa, Masami Ozawa, Toshihiro Sekiguchi
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Patent number: 5446689Abstract: A semiconductor memory device is provided which has a plurality of memory cells each including a pair of cross-coupled metal insulated gate field effect transistors having channels of N-conductivity type, and a pair of load resistors of polycrystalline silicon respectively coupled to the pair of cross-coupled transistors. A peripheral circuit is also provided which is constituted by metal insulated gate field effect transistors having channels of the N-conductivity type and metal insulated gate field effect transistors having channels of P-conductivity type. The semiconductor memory device is formed in an N-type semiconductor substrate, and the pair of cross-coupled metal insulated gate field effect transistors of the memory cells are formed in a well region of P-type which forms a PN-junction with the semiconductor substrate to help reduce the susceptibility to soft errors.Type: GrantFiled: April 21, 1994Date of Patent: August 29, 1995Assignee: Hitachi, Ltd.Inventors: Tokumasa Yasui, Shinji Shimizu, Kotaro Nishimura
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Patent number: 5440340Abstract: A CRT measurement device includes an image pickup device for producing an electrical image signal with respect to a light image displayed on the CRT, an optical system having a movable focusing lens for providing a light image of varied sharpness to the image pickup means in accordance with position of the focusing lens, a sharpness detector for detecting the sharpness of a picked up image based on an electrical image signal each time the focusing lens is moved, a focal position detector for detecting a focal position of the focusing lens providing a most sharpness light image, a driver for driving the focusing lens so as to move to the detected focal position, and calculator means for calculating a characteristic of the color CRT based on the image signal produced when the focusing lens is at the focal position. This device assures automatic and accurate focusing.Type: GrantFiled: June 15, 1993Date of Patent: August 8, 1995Assignee: Minolta Co., Ltd.Inventors: Katsutoshi Tsurutani, Shinji Shimizu, Teruo Ichikawa, Kazunari Mizuguchi, Mitsuo Washino, Yoshiiku Kikukawa
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Patent number: 5428556Abstract: There is provided an apparatus for predicting a tool life which reports a tool life ratio to an operator or a control device, when a remarkable change of work load values is detected. In a predicted life setting section 122, there is set a percentage of a quantity worked until the detection of the noticeable change of the work load values based on the workable quantity until the breakage of the tool which is regarded as 100%. A predicted residual work quantity calculating section 123 calculates a residual tool life value converted into a parameter at a point of time when an alarm is input from a work load monitoring section 121, on the basis of data of a work quantity accumulating section 120 and the predicted life setting section 122. A predicted residual work quantity outputting section 124 reports the residual tool life value to an operator or a control device.Type: GrantFiled: October 6, 1994Date of Patent: June 27, 1995Assignee: Okuma CorporationInventors: Yoshio Torizawa, Shinji Shimizu, Masayuki Okabe
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Patent number: 5359562Abstract: A semiconductor memory device is provided which has a plurality of memory cells each including a pair of cross-coupled metal insulated gate field effect transistors having channels of N-conductivity type, and a pair of load resistors of polycrystalline silicon respectively coupled to the pair of cross-coupled transistors. A peripheral circuit is also provided which is constituted by metal insulated gate field effect transistors having channels of the N-conductivity type and metal insulated gate field effect transistors having channels of P-conductivity type. The semiconductor memory device is formed in an N-type semiconductor substrate, and the pair of cross-coupled metal insulated gate field effect transistors of the memory cells are formed in a well region of P-type which forms a PN-junction with the semiconductor substrate to help reduce the susceptibility to soft errors.Type: GrantFiled: April 15, 1991Date of Patent: October 25, 1994Assignee: Hitachi, Ltd.Inventors: Tokumasa Yasui, Shinji Shimizu, Kotaro Nishimura
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Patent number: 5327210Abstract: A light measurement device includes a photoelectric converter for receiving light from an object to be measured and converting the light to a measuring electrical energy in accordance with the intensity of the light, an offset amount measurement device for measuring the offset amount of the photoelectric converter, temperature measurement device for measuring a first temperature of the photoelectric converter when measuring the offset amount, and a second temperature of the photoelectric converter when measuring the light from the object, a memory device for storing a characteristic of the photoelectric converter with respect to temperature, correction amount calculation device for calculating a correction amount based on the characteristic, the first temperature, and the second temperature, and a light intensity calculation device for calculating a light intensity based on the measuring electrical energy, the offset amount, and the correction amount.Type: GrantFiled: February 23, 1993Date of Patent: July 5, 1994Assignee: Minolta Camera Kabushiki KaishaInventors: Yoshihiro Okui, Kazuhiko Naruse, Taketoshi Kawamura, Shinji Shimizu, Mikio Uematsu, Hiroshi Furukawa, Izumi Horie
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Patent number: 5237528Abstract: A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.Type: GrantFiled: January 17, 1992Date of Patent: August 17, 1993Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Katsuhiro Shimohigashi, Yoshio Sakai, Osamu Minato, Toshiaki Masuhara, Mitsumasa Koyanagi, Shinji Shimizu
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Patent number: 5214496Abstract: A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.Type: GrantFiled: December 19, 1989Date of Patent: May 25, 1993Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Katsuhiro Shimohigashi, Yoshio Sakai, Osamu Minato, Toshiaki Masuhara, Mitsumasa Koyanagi, Shinji Shimizu