Patents by Inventor Shinpei Matsuda

Shinpei Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9306074
    Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 ?m or longer and 6.5 ?m or shorter.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: April 5, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Shinpei Matsuda, Daisuke Matsubayashi
  • Publication number: 20160035897
    Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 4, 2016
    Inventors: Yoshiyuki KOBAYASHI, Shinpei MATSUDA, Daisuke MATSUBAYASHI, Hiroyuki TOMISU
  • Publication number: 20160013321
    Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.
    Type: Application
    Filed: July 1, 2015
    Publication date: January 14, 2016
    Inventors: Yoshiyuki KOBAYASHI, Shinpei MATSUDA, Shunpei YAMAZAKI
  • Publication number: 20160005871
    Abstract: A transistor with a small subthreshold swing value is provided. A transistor with a low density of shallow interface states at an interface between a semiconductor and a gate insulator is provided. A transistor with favorable electrical characteristics is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. The semiconductor includes a region in which the semiconductor and the conductor overlap each other with the insulator positioned therebetween, and the density of shallow interface states at an interface between the semiconductor and the insulator in the region is lower than or equal to 1×1013 cm?2.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 7, 2016
    Inventors: Shinpei MATSUDA, Toshihiko TAKEUCHI, Daisuke MATSUBAYASHI
  • Publication number: 20150109019
    Abstract: A method for evaluating a buried channel in a semiconductor device including a semiconductor layer having a stacked-layer structure is provided. A method for evaluating a semiconductor device is provided, which includes the steps of: electrically short-circuiting a source and a drain of a transistor; applying DC voltage and AC voltage to a gate to obtain a CV characteristic that indicates a relationship between the DC voltage and a capacitance between the gate and each of the source and the drain; and determining that a semiconductor layer of the transistor includes a stacked-layer structure, when the capacitance in a region in an accumulation state in the CV characteristic is increased stepwise.
    Type: Application
    Filed: October 16, 2014
    Publication date: April 23, 2015
    Inventors: Shinpei MATSUDA, Toshihiko TAKEUCHI, Daisuke MATSUBAYASHI
  • Publication number: 20150076472
    Abstract: A light-emitting device, a lighting device, a display device, or the like in which the state of a back surface side can be observed when light is not emitted is provided. The light-emitting device includes a plurality of light-emitting portions and a region transmitting visible light in a region other than the light-emitting portions. Alternatively, the light-emitting device includes a plurality of light-transmitting portions transmitting visible light and a light-emitting portion that can emit light in a region other than the light-transmitting portions. When light is not emitted, the state of a back surface side of the light-emitting device is visible through the region transmitting visible light. When light is emitted, the state of the back surface side of the light-emitting device can be made less visible by diffusion of light emitted from the light-emitting portion.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 19, 2015
    Inventors: Shunpei YAMAZAKI, Shinpei MATSUDA, Takuya KAWATA
  • Publication number: 20140362324
    Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Kouhei TOYOTAKA, Masahiko HAYAKAWA, Daisuke MATSUBAYASHI, Shinpei MATSUDA
  • Publication number: 20140361292
    Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 ?m or longer and 6.5 ?m or shorter.
    Type: Application
    Filed: June 2, 2014
    Publication date: December 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Shinpei Matsuda, Daisuke Matsubayashi
  • Publication number: 20140361290
    Abstract: In a pixel including a selection transistor, a driver transistor, and a light-emitting element, as the driver transistor, a transistor is used in which a channel is formed in an oxide semiconductor film and its channel length is 0.5 ?m or greater and 4.5 ?m or less. The driver transistor includes a first gate electrode over an oxide semiconductor film and a second gate electrode below the oxide semiconductor film. The first gate electrode and the second gate electrode are electrically connected to each other and overlap with the oxide semiconductor film. Furthermore, in the selection transistor of a pixel, which does not need to have field-effect mobility as high as that of the driver transistor, a channel length is made longer than at least the channel length of the driver transistor.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Seiko INOUE, Shinpei MATSUDA, Daisuke MATSUBAYASHI, Masahiko HAYAKAWA
  • Publication number: 20140339544
    Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 20, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuya HANAOKA, Daisuke Matsubayashi, Yoshiyuki Kobayashi, Shunpei Yamazaki, Shinpei Matsuda
  • Publication number: 20140339539
    Abstract: A semiconductor device including a transistor having excellent electrical characteristics is provided. Alternatively, a semiconductor device having a high aperture ratio and including a capacitor capable of increasing capacitance is provided. The semiconductor device includes a gate electrode, an oxide semiconductor film overlapping the gate electrode, an oxide insulating film in contact with the oxide semiconductor film, a first oxygen barrier film between the gate electrode and the oxide semiconductor film, and a second oxygen barrier film in contact with the first oxygen barrier film. The oxide semiconductor film and the oxide insulating film are provided on an inner side of the first oxygen barrier film and the second oxygen barrier film.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 20, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Kenichi OKAZAKI, Masahiko HAYAKAWA, Shinpei MATSUDA
  • Publication number: 20140340608
    Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.
    Type: Application
    Filed: May 8, 2014
    Publication date: November 20, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Kenichi OKAZAKI, Masahiko HAYAKAWA, Shinpei MATSUDA
  • Patent number: 8804882
    Abstract: Suitable gain control is achieved at low cost. In a receiving apparatus, an RF signal that is amplified by an RF amp is converted to an IF frequency by a frequency conversion unit and amplified by an IF amp, then the output signal from the IF amp that was converted to a digital signal by an ADC is inputted to a digital processing unit. The output from the ADC is then filtered to a desired frequency by a digital filter and inputted to the digital processing unit. In the digital processing unit the signal power before filtering by the digital filter and the signal power after filtering by the digital filter are measured, and the power difference is calculated. Based on the power difference, which indicates the ratio of unnecessary power, the digital processing unit controls the gain ratio of the RF amp and IF amp.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: August 12, 2014
    Assignees: Casio Computer Co., Ltd., Oki Semiconductor Co., Ltd.
    Inventors: Hiromune Nagai, Shinpei Matsuda, Hiroji Akahori
  • Publication number: 20140183530
    Abstract: A semiconductor device includes an oxide semiconductor layer over a first oxide layer; first source and drain electrodes over the oxide semiconductor layer; second source and drain electrodes over the first source and drain electrodes respectively; a second oxide layer over the first source and drain electrodes; a gate insulating layer over the second source and drain electrodes and the second oxide layer; and a gate electrode overlapping the oxide semiconductor layer with the gate insulating layer provided therebetween. The structure in which the oxide semiconductor layer is sandwiched by the oxide layers can suppress the entry of impurities into the oxide semiconductor layer. The structure in which the oxide semiconductor layer is contacting with the source and drain electrodes can prevent increasing resistance between the source and the drain comparing one in which an oxide semiconductor layer is electrically connected to source and drain electrodes through an oxide layer.
    Type: Application
    Filed: December 27, 2013
    Publication date: July 3, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Shinpei Matsuda, Masashi Oota, Noritaka Ishihara
  • Publication number: 20110255642
    Abstract: Suitable gain control is achieved at low cost. In a receiving apparatus, an RF signal that is amplified by an RF amp is converted to an IF frequency by a frequency conversion unit and amplified by an IF amp, then the output signal from the IF amp that was converted to a digital signal by an ADC is inputted to a digital processing unit. The output from the ADC is then filtered to a desired frequency by a digital filter and inputted to the digital processing unit. In the digital processing unit the signal power before filtering by the digital filter and the signal power after filtering by the digital filter are measured, and the power difference is calculated. Based on the power difference, which indicates the ratio of unnecessary power, the digital processing unit controls the gain ratio of the RF amp and IF amp.
    Type: Application
    Filed: April 15, 2011
    Publication date: October 20, 2011
    Applicants: OKI SEMICONDUCTOR CO., LTD., CASIO COMPUTER CO., LTD.
    Inventors: Hiromune Nagai, Shinpei Matsuda, Hiroji Akahori
  • Patent number: 5798312
    Abstract: An elongate superconductor wiring element having, as seen in section, oxide superconductor material regions in each of which the c-axes of the oxide superconductor crystals are aligned with each other and are transverse to the longitudinal axis of the element. To reduce the dependence of critical current density on angular position of the element relative to a magnetic field, there are a plurality of said regions whose alignment directions of the c-axes are different as between different ones of said regions, so that the wiring element comprises a plurality of said regions having respectively different c-axis alignment directions.
    Type: Grant
    Filed: June 21, 1994
    Date of Patent: August 25, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Michiya Okada, Kazuhide Tanaka, Toyotaka Yuasa, Toshimi Matsumoto, Katsuzo Aihara, Shinpei Matsuda
  • Patent number: 5680085
    Abstract: A magnetic field generator has a superconductive coil immersed in a coolant material. When power is supplied to the superconductive coil from a suitable power source, the superconductive coil is energized to generate the magnetic field. The ends of the superconductive coil may then be shorted through a persistent current switch, to maintain the magnetic field without the need for further power. The persistent current switch has a superconductive connection connected across the ends of the superconductive coil and a heater. These components are enclosed in a casing with a gap between these components and the casing. Apertures in the casing permit coolant material to enter the gap. When the heater is energized, it heats the coolant material in the gap until it vaporizes. There is then a significant decrease in the thermal conductivity through the gap and hence the superconductive connection is heated rapidly to its critical temperature. Only low power is needed.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: October 21, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Katsuzo Aihara, Shinpei Matsuda, Tomoichi Kamo
  • Patent number: 5648322
    Abstract: A superconductive material has the formula(Tl.sub.1-X1-X2 Pb.sub.X1 Bi.sub.X2).sub..alpha. (Sr.sub.1-X3 Ba.sub.X3).sub..beta. Ca.sub..gamma. Cu.sub..delta. O.sub..xi.where0.ltoreq.X1.ltoreq.0.80.ltoreq.X2.ltoreq.0.50.ltoreq.X3.ltoreq.1.00.7.ltoreq..alpha..ltoreq.1.51.4.ltoreq..beta..ltoreq.3.00.7.ltoreq..gamma..ltoreq.4.51.4.ltoreq..delta..ltoreq.64.5.ltoreq..xi..ltoreq.170<X1+X2<1.The superconducting material may be combined with an isostructural non-superconducting material, which then acts as a pinning center. The result may also be combined with a metal. The resulting superconductor permits a high critical current density Jc to be obtained, even at relatively high magnetic flux densities.
    Type: Grant
    Filed: May 25, 1995
    Date of Patent: July 15, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Toshiya Doi, Takeshi Ozawa, Kazuhide Tanaka, Toyotaka Yuasa, Tomoichi Kamo, Shinpei Matsuda
  • Patent number: 5545610
    Abstract: An oxide-based superconductor ccmprising Tl, Pb, Sr, Ca and Cu or Tl, Pb, Ba, Sr, Ca and Cu, prepared by subjecting a low melting point composition comprising the superconductor-constituting elements and a solid composition comprising the superconductor-constituting elements, prepared in advance, to reaction under melting conditions for the low melting point composition, has distinguished current pass characteristics in a high magnetic field due to improvement of electric contact among grains through reduction of non-superconductor phase, increase in crystal grain sizes (reduction of crystal boundaries), orientation of crystal and cleaning of crystal boundaries.
    Type: Grant
    Filed: September 2, 1993
    Date of Patent: August 13, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kazutoshi Higashiyama, Toshiya Doi, Takesi Ozawa, Seizi Takeuchi, Tomoichi Kamo, Shinpei Matsuda, Yutaka Yoshida
  • Patent number: 5510323
    Abstract: An oxide superconductor comprising a perovskite type oxide compound of thallium, strontium, calcium and copper or thallium, strontium, balium, calcium and copper is produced by absorbing thallium in a gaseous phase into a mixture of strontium oxide or strontium oxide and barium oxide, calcium oxide, and copper oxide or a mixture of compounds capable of producing these oxides upon firing. From this superconductor are provided a superconductor wire material, tape-shaped wire material, coil, thin film, magnet, magnetic shielding material, printed circuit board, measuring device, computer, power storing device and etc.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: April 23, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Tomoichi Kamo, Seizi Takeuchi, Shinpei Matsuda, Atsuko Soeta, Takaaki Suzuki, Yutaka Yoshida