Patents by Inventor Shinya Nunoue

Shinya Nunoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955520
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternatively a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 9, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hajime Nago, Jumpei Tajima, Shinya Nunoue
  • Publication number: 20240096969
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternately a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Patent number: 11888040
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: January 30, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Publication number: 20240014273
    Abstract: According to one embodiment, a semiconductor device includes a substrate, and a first semiconductor layer including magnesium and Alx1Ga1?x1N. The first semiconductor layer includes first, second, and third regions. The first region is between the substrate and the third region. The second region is between the first and third regions. A first concentration of magnesium in the first region is greater than a third concentration of magnesium in the third region. A second concentration of magnesium in the second region decreases along a first orientation. The first orientation is from the substrate toward the first semiconductor layer. A second change rate of a logarithm of the second concentration with respect to a change of a position along the first orientation is greater than a third change rate of a logarithm of the third concentration with respect to the change of the position along the first orientation.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Jumpei TAJIMA, Shinya NUNOUE
  • Patent number: 11817483
    Abstract: A semiconductor device is provided, including: a substrate; and a first semiconductor layer including magnesium and Alx/Ga1?x1N (0?x1<1), the first semiconductor layer including a first region, a second region, and a third region, the first region being between the substrate and the third region, the second region being between the first region and the third region, a first concentration of magnesium in the first region being greater than a third concentration of magnesium in the third region, a second concentration of magnesium in the second region decreasing along a first orientation, the first orientation being from the substrate toward the first semiconductor layer, and the first region not including carbon, or a concentration of carbon in the first region being less than the concentration of carbon in the third region.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: November 14, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Jumpei Tajima, Shinya Nunoue
  • Publication number: 20230261058
    Abstract: According to one embodiment, a nitride crystal includes first, second, and third nitride crystal regions. The third nitride crystal region includes Al, and is provided between the first and second nitride crystal regions. A third oxygen concentration in the third nitride crystal region is greater than a first oxygen concentration in the first nitride crystal region and greater than a second oxygen concentration in the second nitride crystal region. A third carbon concentration in the third nitride crystal region is greater than a first carbon concentration in the first nitride crystal region and greater than a second carbon concentration in the second nitride crystal region. A <0001> direction of the first nitride crystal region is one of a first orientation from the second nitride crystal region toward the first nitride crystal region or a second orientation from the first nitride crystal region toward the second nitride crystal region.
    Type: Application
    Filed: April 5, 2023
    Publication date: August 17, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, OSAKA UNIVERSITY
    Inventors: Toshiki HIKOSAKA, Shinya NUNOUE, Tomoyuki TANIKAWA, Ryuji KATAYAMA, Masahiro UEMUKAI
  • Patent number: 11699724
    Abstract: According to one embodiment, a semiconductor device includes a first crystal region, a second crystal region, a third crystal region, and a fourth crystal region. The first crystal region includes magnesium and Alx1Ga1-x1N (0?x1<1). The second crystal region includes Alx2Ga1-x2N (0<x2?1). The third crystal region is provided between the first crystal region and the second crystal region. The third crystal region includes oxygen and Alx3Ga1-x3N (0?x3?1 and x3<x2). The fourth crystal region is provided between the third crystal region and the second crystal region. The fourth crystal region includes Alx4Ga1-x4N (0?x4<1 and x4<x2).
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: July 11, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20230197444
    Abstract: According to one embodiment, a wafer includes a silicon substrate including a first surface, and a nitride semiconductor layer provided on the first surface. The silicon substrate includes a plurality of first regions that can be distinguished from each other in an X-ray image of the wafer. The first regions are separated from an outer edge region of the silicon substrate. One of the first regions includes a plurality of first linear bodies along a first line direction. An other one of the first regions includes a plurality of second linear bodies along a second line direction. The second line direction crosses the first line direction.
    Type: Application
    Filed: August 10, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Jumpei TAJIMA, Hajime NAGO, Toshiki HIKOSAKA, Shinya NUNOUE
  • Patent number: 11677006
    Abstract: According to one embodiment, a nitride crystal includes first, second, and third nitride crystal regions. The third nitride crystal region includes Al, and is provided between the first and second nitride crystal regions. A third oxygen concentration in the third nitride crystal region is greater than a first oxygen concentration in the first nitride crystal region and greater than a second oxygen concentration in the second nitride crystal region. A third carbon concentration in the third nitride crystal region is greater than a first carbon concentration in the first nitride crystal region and greater than a second carbon concentration in the second nitride crystal region. A <0001> direction of the first nitride crystal region is one of a first orientation from the second nitride crystal region toward the first nitride crystal region or a second orientation from the first nitride crystal region toward the second nitride crystal region.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: June 13, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, OSAKA UNIVERSITY
    Inventors: Toshiki Hikosaka, Shinya Nunoue, Tomoyuki Tanikawa, Ryuji Katayama, Masahiro Uemukai
  • Publication number: 20230078716
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Application
    Filed: November 15, 2022
    Publication date: March 16, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hiroshi ONO, Jumpei TAJIMA, Masahiko KURAGUCHI, Shinya NUNOUE
  • Publication number: 20230073529
    Abstract: According to one embodiment, a semiconductor device includes a substrate, and a first semiconductor layer including magnesium and Alx1Ga1?x1N. The first semiconductor layer includes first, second, and third regions. The first region is between the substrate and the third region. The second region is between the first and third regions. A first concentration of magnesium in the first region is greater than a third concentration of magnesium in the third region. A second concentration of magnesium in the second region decreases along a first orientation. The first orientation is from the substrate toward the first semiconductor layer. A second change rate of a logarithm of the second concentration with respect to a change of a position along the first orientation is greater than a third change rate of a logarithm of the third concentration with respect to the change of the position along the first orientation.
    Type: Application
    Filed: November 11, 2022
    Publication date: March 9, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20230071966
    Abstract: According to one embodiment, a semiconductor device includes a first crystal region, a second crystal region, a third crystal region, and a fourth crystal region. The first crystal region includes magnesium and Alx1Ga1-x1N (0?x1<1). The second crystal region includes Alx2Ga1-x2N (0<x2?1). The third crystal region is provided between the first crystal region and the second crystal region. The third crystal region includes oxygen and Alx3Ga1-x3N (0?x3?1 and x3<x2). The fourth crystal region is provided between the third crystal region and the second crystal region. The fourth crystal region includes Alx4Ga1-x4N (0?x4<1 and x4<x2).
    Type: Application
    Filed: November 10, 2022
    Publication date: March 9, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei TAJIMA, Toshiki HIKOSAKA, Shinya NUNOUE
  • Publication number: 20230046560
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, a nitride member, and an intermediate region provided between the base body and the nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the intermediate region and the second nitride region. The intermediate region includes nitrogen and carbon. A concentration of carbon in the intermediate region is not less than 1.5×1019/cm3 and not more than 6×1020/cm3.
    Type: Application
    Filed: February 10, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Publication number: 20230049717
    Abstract: According to one embodiment, a nitride semiconductor includes a base body, and a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), and a second nitride region including Alx2Ga1-x2N (0?x2<1, x2<x1). The first nitride region is between the base body and the second nitride region. The first nitride region includes a first portion and a second portion. The second portion is between the first portion and the second nitride region. An oxygen concentration in the first portion is higher than an oxygen concentration in the second portion. The oxygen concentration in the second portion is not more than 1×1018/cm3. A first thickness of the first portion in a first direction from the first to second nitride regions is thinner than a second thickness of the second portion in the first direction.
    Type: Application
    Filed: February 1, 2022
    Publication date: February 16, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Patent number: 11581407
    Abstract: According to one embodiment, a semiconductor device includes a substrate, and a first semiconductor layer including magnesium and Alx1Ga1-x1N. The first semiconductor layer includes first, second, and third regions. The first region is between the substrate and the third region. The second region is between the first and third regions. A first concentration of magnesium in the first region is greater than a third concentration of magnesium in the third region. A second concentration of magnesium in the second region decreases along a first orientation. The first orientation is from the substrate toward the first semiconductor layer. A second change rate of a logarithm of the second concentration with respect to a change of a position along the first orientation is greater than a third change rate of a logarithm of the third concentration with respect to the change of the position along the first orientation.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: February 14, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Jumpei Tajima, Shinya Nunoue
  • Patent number: 11545553
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor layer, a second semiconductor layer, and a first insulating layer. A position of the third electrode in a first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction. The first semiconductor layer includes Alx1Ga1-x1N and includes a first partial region, a second partial region, and a third partial region. The second semiconductor layer includes Alx2Ga1-x2N. A portion of the second semiconductor layer is between the third partial region and the third electrode in the second direction. The first insulating layer includes a first insulating region. The first insulating region is between the third electrode and the portion of the second semiconductor layer in the second direction.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: January 3, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Hikosaka, Hiroshi Ono, Jumpei Tajima, Masahiko Kuraguchi, Shinya Nunoue
  • Patent number: 11538909
    Abstract: According to one embodiment, a semiconductor device includes a first crystal region, a second crystal region, a third crystal region, and a fourth crystal region. The first crystal region includes magnesium and Alx1Ga1-x1N (0?x1<1). The second crystal region includes Alx2Ga1-x2N (0<x2?1). The third crystal region is provided between the first crystal region and the second crystal region. The third crystal region includes oxygen and Alx3Ga1-x3N (0?x3?1 and x3<x2). The fourth crystal region is provided between the third crystal region and the second crystal region. The fourth crystal region includes Alx4Ga1-x4N (0?x4<1 and x4<x2).
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: December 27, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue
  • Patent number: 11444189
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third electrodes, first, second, and third semiconductor layers, and a first insulating member. The first semiconductor layer includes first, second, third, fourth, and fifth partial regions. A direction from the first partial region toward the second partial region is along a first direction. The first electrode includes a first electrode portion. A direction from the first electrode portion toward the second electrode is along the first direction. A second direction from the third partial region toward the third electrode crosses the first direction. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion. At least a portion of the first semiconductor layer is between the third and second semiconductor layers. The first insulating member includes a first insulating portion. The first insulating portion is provided between the third partial region and the third electrode.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: September 13, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jumpei Tajima, Toshiki Hikosaka, Shinya Nunoue
  • Publication number: 20220190119
    Abstract: According to one embodiment, a nitride semiconductor includes a nitride member. The nitride member includes a first nitride region including Alx1Ga1-x1N (0<x1?1), a second nitride region including Alx2Ga1-x2N (0<x2<1, x2<x1), and a third nitride region. The second nitride region is between the first nitride region and the third nitride region. The third nitride region includes Al, Ga, and N. The third nitride region does not include carbon, alternately a third carbon concentration in the third nitride region is lower than a second carbon concentration in the second nitride region.
    Type: Application
    Filed: July 8, 2021
    Publication date: June 16, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki HIKOSAKA, Hajime NAGO, Jumpei TAJIMA, Shinya NUNOUE
  • Patent number: 11333700
    Abstract: According to one embodiment, an inspection apparatus of a semiconductor device includes a first probe configured to contact a first portion of the semiconductor device, a conductive member configured to oppose a second portion of the semiconductor device, and a detector configured to apply a first voltage between the semiconductor device and the first probe, to apply a conductive member voltage between the semiconductor device and the conductive member, and to detect a current flowing in the first probe. The first voltage has a first polarity of one of positive or negative when referenced to a potential of the semiconductor device. The conductive member voltage has a second polarity of the other of positive or negative when referenced to the potential of the semiconductor device.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: May 17, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Jumpei Tajima, Jongil Hwang, Shinya Nunoue