Patents by Inventor Shiro Yamazaki

Shiro Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080223286
    Abstract: Objects of the invention are to further enhance crystallinity and crystallinity uniformity of a semiconductor crystal produced through the flux method, and to effectively enhance the production yield of the semiconductor crystal. The c-axis of a seed crystal including a GaN single-crystal layer is aligned in a horizontal direction (y-axis direction), one a-axis of the seed crystal is aligned in the vertical direction, and one m-axis is aligned in the x-axis direction. Thus, three contact points at which a supporting tool contacts the seed crystal are present on m-plane. The supporting tool has two supporting members, which extend in the vertical direction. One supporting member has an end part, which is inclined at 30° with respect to the horizontal plane ?. The reasons for supporting a seed crystal at m-plane thereof are that m-plane exhibits a crystal growth rate, which is lower than that of a-plane, and that desired crystal growth on c-plane is not inhibited.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 18, 2008
    Applicants: TOYODA GOSEI CO., LTD., NGK INSULATORS, LTD.,, OSAKA UNIVERSIITY
    Inventors: Seiji Nagai, Shiro Yamazaki, Takayuki Sato, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Publication number: 20080223288
    Abstract: An object of the invention is to carry out the flux method with improved work efficiency while maintaining the purity of flux at high level and saving flux material cost. The sodium-purifying apparatus includes a sodium-holding-and-management apparatus for maintaining purified sodium (Na) in a liquid state. Liquid sodium is supplied into a sodium-holding-and-management apparatus through a liquid-sodium supply piping maintained at 100° C. to 200° C. The sodium-holding-and-management apparatus further has an argon-gas-purifying apparatus for controlling the condition of argon (Ar) gas that fills the internal space thereof. Thus, by opening and closing a faucet at desired timing, purified liquid sodium (Na) supplied from the sodium-purifying apparatus can be introduced into a crucible as appropriate via the liquid-sodium supply piping, the sodium-holding-and-management apparatus, and the piping.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 18, 2008
    Applicants: TOYODA GOSEI CO., LTD., NGK INSULATORS, LTD., Yusuke MORI
    Inventors: Shiro Yamazaki, Koji Hirata, Takayuki Sato, Seiji Nagai, Katsuhiro Imai, Makoto Iwai, Shuhei Higashihara, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Publication number: 20080173880
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Application
    Filed: December 20, 2007
    Publication date: July 24, 2008
    Applicant: Toyoda Gosei
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 7332366
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: February 19, 2008
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Publication number: 20070101931
    Abstract: The present invention provides a method for producing a Group III nitride compound semiconductor crystal, the semiconductor crystal being grown through the flux method employing a flux. At least a portion of a substrate on which the semiconductor crystal is to be grown is formed of a flux-soluble material. While the semiconductor crystal is grown on a surface of the substrate, the flux-soluble material is dissolved in the flux from a surface of the substrate that is opposite the surface on which the semiconductor crystal is grown. Alternatively, after the semiconductor crystal has been grown on a surface of the substrate, the flux-soluble material is dissolved in the flux from a surface of the substrate that is opposite the surface on which the semiconductor crystal has been grown. The flux-soluble material is formed of silicon.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 10, 2007
    Applicants: TOYODA GOSEI CO., LTD., NGK INSULATORS, LTD., OSAKA UNIVERSITY
    Inventors: Shiro Yamazaki, Koji Hirata, Katsuhiro Imai, Makoto Iwai, Takatomo Sasaki, Yusuke Mori, Masashi Yoshimura, Fumio Kawamura, Yuji Yamada
  • Publication number: 20060273324
    Abstract: The back surface of a semiconductor crystal substrate 102 which has a thickness of about 150 ?m and is made of undoped GaN bulk crystal consists of a polished plane 102a which is flattened through dry-etching and a grinded plane 102b which is formed in a taper shape and is flattened through dry-etching. On about 10 nm in thickness of GaN n-type clad layer (low carrier concentration layer) 104, about 2 nm in thickness of Al0.005In0.045Ga0.95N well layer 51 and about 18 nm in thickness of Al0.12Ga0.88N barrier layer 52 are deposited alternately as an active layer 105 which emits ultraviolet light and has MQW structure comprising 5 layers in total. Before forming a negative electrode (n-electrode c) on the polished plane of the semiconductor substrate a, the polished plane is dry-etched.
    Type: Application
    Filed: July 26, 2004
    Publication date: December 7, 2006
    Inventors: Makoto Asai, Shiro Yamazaki, Takahiro Kozawa, Mitsuhisa Narukawa
  • Patent number: 7138286
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: November 21, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 7112243
    Abstract: The present invention provides a method for producing a Group III nitride compound semiconductor, which method permits only minimal reaction of the semiconductor with a hetero-substrate during epitaxial growth and induces no cracks in the Group III nitride compound semiconductor even when the semiconductor is cooled to room temperature. The method includes a buffer layer formation step for forming a gas-etchable buffer layer on the hetero-substrate, and a semiconductor formation step for epitaxially growing the Group III nitride compound semiconductor on the buffer layer through a vapor phase growth method, wherein at least a portion of the buffer layer is gas-etched during or after the semiconductor formation step.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: September 26, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Shiro Yamazaki
  • Patent number: 7084421
    Abstract: A light-emitting semiconductor device provides an active layer which comprises thirteen (13) layers that includes six (6) pairs of quantum barrier layers made of Al0.95In0.05N and quantum well layers made of Al0.70In0.30N, which are laminated together alternately. The semiconductor device may also comprise a quantum well layer having a high composition ratio of indium (In). Forming the quantum barrier layer and the quantum well layer to have a high composition ratio of indium (In) increases the lattice constant of the active layer of the semiconductor device.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: August 1, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Shiro Yamazaki, Akira Kojima
  • Publication number: 20060118821
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Application
    Filed: January 10, 2006
    Publication date: June 8, 2006
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 7052979
    Abstract: When a substrate layer (desired semiconductor crystal) made of a group III nitride compound is grown on a base substrate comprising a lot of projection parts, a cavity in which a semiconductor crystal is not deposited may be formed between each projection part although it depends on conditions such as the size of each projection part, arranging interval between each projection part and crystal growth. So when the thickness of the substrate layer is sufficiently larger compared with the height of the projection part, inner stress or outer stress become easier to act intensively to the projection part. As a result, such stress especially functions as shearing stress toward the projection part. When the shearing stress becomes larger, the projection part is ruptured. So utilizing the shearing stress enables to separate the base substrate and the substrate layer easily.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: May 30, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Seiji Nagai, Kazuyoshi Tomita, Shiro Yamazaki, Yuta Tezen, Toshio Hiramatsu
  • Patent number: 7001790
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: February 21, 2006
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 6984536
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1?xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1?xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1?xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semiconductor (AlxGa1?xN) ha
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: January 10, 2006
    Assignees: Toyoda Gosei Co., Ltd., Japan Science and Technology Agency, Nagoya University
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20050224834
    Abstract: A light-emitting semiconductor device (10) consecutively includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n+-layer (3) of high carrier (n-type) concentration, a Si-doped (Alx3Ga1-x3)y3In1-y3N n+-layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped (Alx2Ga1-x2)y2In1-y2N emission layer (5), and a Mg-doped (Alx1Ga1-x1)y1In1-y1N p-layer (6). The AlN layer (2) has a 500 ? thickness. The GaN n+-layer (3) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The n+-layer (4) has about a 2.0 ?m thickness and a 2×1018/cm3 electron concentration. The emission layer (5) has about a 0.5 ?m thickness. The p-layer 6 has about a 1.0 ?m thickness and a 2×1017/cm3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n+-layer (4), respectively. A groove (9) electrically insulates the electrodes (7, 8).
    Type: Application
    Filed: June 3, 2005
    Publication date: October 13, 2005
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Hisaki Kato, Michinari Sassa, Shiro Yamazaki, Makoto Asai, Naoki Shibata, Masayoshi Koike
  • Patent number: 6830992
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 14, 2004
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20040123796
    Abstract: When a substrate layer (desired semiconductor crystal) made of a group III nitride compound is grown on a base substrate comprising a lot of projection parts, a cavity in which a semiconductor crystal is not deposited may be formed between each projection part although it depends on conditions such as the size of each projection part, arranging interval between each projection part and crystal growth. So when the thickness of the substrate layer is sufficiently larger compared with the height of the projection part, inner stress or outer stress become easier to act intensively to the projection part. As a result, such stress especially functions as shearing stress toward the projection part. When the shearing stress becomes larger, the projection part is ruptured. So utilizing the shearing stress enables to separate the base substrate and the substrate layer easily.
    Type: Application
    Filed: October 9, 2003
    Publication date: July 1, 2004
    Inventors: Seiji Nagai, Kazuyoshi Tomita, Shiro Yamazaki, Yuta Tezen, Toshio Hiramatsu
  • Patent number: 6607595
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlXGa1-xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1-XN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1-xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semiconductor (AlxGa1-x
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: August 19, 2003
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyu sho, Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hasimoto, Isamu Akasaki
  • Patent number: 6593599
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: July 15, 2003
    Assignees: Japan Science and Technology Corporation, Toyoda Gosei Co., Ltd., Nagoya University
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20030027407
    Abstract: The present invention provides a method for producing a Group III nitride compound semiconductor, which method permits only minimal reaction of the semiconductor with a hetero-substrate during epitaxial growth and induces no cracks in the Group III nitride compound semiconductor even when the semiconductor is cooled to room temperature. The method includes a buffer layer formation step for forming a gas-etchable buffer layer on the hetero-substrate, and a semiconductor formation step for epitaxially growing the Group III nitride compound semiconductor on the buffer layer through a vapor phase growth method, wherein at least a portion of the buffer layer is gas-etched during or after the semiconductor formation step.
    Type: Application
    Filed: July 23, 2002
    Publication date: February 6, 2003
    Inventors: Masayoshi Koike, Shiro Yamazaki
  • Patent number: 6472689
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: October 29, 2002
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki