Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: To prevent a decline in image quality by reducing a fluctuation in an image signal that is based on a fluctuation in a voltage of a negative voltage power source. An image signal output unit is controlled in accordance with a first control signal indicating either voltage state of an on voltage for causing a conductive state and an off voltage having a polarity different from that of the on voltage, and outputs an analog image signal corresponding to the electric charge held by an electric charge holding unit in the conductive state. A reset unit is controlled in accordance with a second control signal indicating either voltage state of the on voltage and the off voltage, resets the electric charge holding unit in the conductive state, transmits a fluctuation in the off voltage to the electric charge holding unit, and fluctuates the analog image signal.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present technology relates to a solid-state imaging device, an electronic apparatus, and an AD converter that are capable of suppressing the occurrence of an error in AD conversion results. The solid-state imaging device includes a pixel section having a plurality of pixels, a comparator for comparing a pixel signal outputted from the pixels with a reference signal, and a counter for counting the time of comparison made by the comparator. The comparator includes a first amplifier for comparing the pixel signal with the reference signal, a second amplifier that has a first transistor and amplifies an output signal of the first amplifier, and a second transistor having the same polarity as the first transistor. A gate of the second transistor is connected to an output end of the first amplifier, and a source and a drain of the second transistor are connected to the same fixed potential as a source of the first transistor. The present technology is applicable, for example, to a CMOS image sensor.

Abstract: The present technology relates to a solid-state imaging device, an electronic apparatus, and an AD converter that are capable of suppressing the occurrence of an error in AD conversion results. The solid-state imaging device includes a pixel section having a plurality of pixels, a comparator for comparing a pixel signal outputted from the pixels with a reference signal, and a counter for counting the time of comparison made by the comparator. The comparator includes a first amplifier for comparing the pixel signal with the reference signal, a second amplifier that has a first transistor and amplifies an output signal of the first amplifier, and a second transistor having the same polarity as the first transistor. A gate of the second transistor is connected to an output end of the first amplifier, and a source and a drain of the second transistor are connected to the same fixed potential as a source of the first transistor. The present technology is applicable, for example, to a CMOS image sensor.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: To reduce fluctuations in image signals when the voltage of a negative power supply supplied to pixels changes. A pixel operates based on a first ground potential applied to a first ground line and outputs an analog image signal according to emitted light. An analog-digital converter operates based on a second ground potential applied to a second ground line, the second ground potential higher than the first ground potential, and converts the analog image signal into a digital image signal based on a reference voltage as a standard for the conversion. A reference voltage generation unit operates based on the second ground potential and generates the reference voltage. A reference voltage correction unit corrects the reference voltage generated according to a change in the first ground potential and supplies the reference voltage to the analog-digital converter.

Abstract: The present technique relates to an image pickup element and an electronic apparatus which enable a higher-quality image to be obtained. An image pickup element includes an input sense portion configured to produce a noise correction signal for correcting a noise generated in a predetermined power source. The input sense portion includes a first transistor and a second transistor configuring a current mirror circuit, a switch provided between a gate of the first transistor and a gate of the second transistor, and a capacitive element one electrode of which is connected between the switch and the gate of the second transistor on an output side of the current mirror circuit, and the other electrode of which is connected to the predetermined power source.

Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: To reduce fluctuations in image signals when the voltage of a negative power supply supplied to pixels changes. A pixel operates based on a first ground potential applied to a first ground line and outputs an analog image signal according to emitted light. An analog-digital converter operates based on a second ground potential applied to a second ground line, the second ground potential higher than the first ground potential, and converts the analog image signal into a digital image signal based on a reference voltage as a standard for the conversion. A reference voltage generation unit operates based on the second ground potential and generates the reference voltage. A reference voltage correction unit corrects the reference voltage generated according to a change in the first ground potential and supplies the reference voltage to the analog-digital converter.

Abstract: Provided is a solid-state imaging device including: a pixel section configured to include a plurality of pixels arranged in a matrix form, the plurality of pixels performing photoelectric conversion; column signal lines configured to transmit pixel signals output from the pixels in units of columns; an AD converting section configured to include a comparator that compares a reference signal serving as a ramp wave with the pixel signals transmitted via the column signal line and convert a reference level and a signal level of the pixel signals into digital signals independently based on a comparison result of the comparator; a switch configured to be connected with the column signal lines; and a control section configured to turn on the switch only during a certain period of time in a period of time in which the comparator is reset and cause the column signal lines to be short-circuited.

Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: The present technology relates to a solid-state imaging device, an electronic apparatus, and an AD converter that are capable of suppressing the occurrence of an error in AD conversion results. The solid-state imaging device includes a pixel section having a plurality of pixels, a comparator for comparing a pixel signal outputted from the pixels with a reference signal, and a counter for counting the time of comparison made by the comparator. The comparator includes a first amplifier for comparing the pixel signal with the reference signal, a second amplifier that has a first transistor and amplifies an output signal of the first amplifier, and a second transistor having the same polarity as the first transistor. A gate of the second transistor is connected to an output end of the first amplifier, and a source and a drain of the second transistor are connected to the same fixed potential as a source of the first transistor. The present technology is applicable, for example, to a CMOS image sensor.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.

Abstract: Provided is a solid-state imaging device including: a pixel section configured to include a plurality of pixels arranged in a matrix form, the plurality of pixels performing photoelectric conversion; column signal lines configured to transmit pixel signals output from the pixels in units of columns; an AD converting section configured to include a comparator that compares a reference signal serving as a ramp wave with the pixel signals transmitted via the column signal line and convert a reference level and a signal level of the pixel signals into digital signals independently based on a comparison result of the comparator; a switch configured to be connected with the column signal lines; and a control section configured to turn on the switch only during a certain period of time in a period of time in which the comparator is reset and cause the column signal lines to be short-circuited.

Abstract: A comparator includes: a first amplifying unit that includes a differential pair configured with a pair of transistors which are first and second transistors, and amplifies a difference of signals input to each of the gate electrodes of the first and second transistors, to output; a second amplifying unit that amplifies the signal output from the first amplifying unit; a third transistor that connects the first transistor to a power source voltage; a fourth transistor that connects the second transistor to the power source voltage; a fifth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the third transistor; and a sixth transistor that connects a connection point of gate electrodes of the third transistor and the fourth transistor to a drain of the fourth transistor.

Abstract: An image sensor comprises a pixel circuit including a reset transistor and configured to output a pixel signal; and a differential comparator including a pixel input, a reference input, and a comparator output, wherein one of a source or a drain of the reset transistor is connected to the comparator output. In this manner, an active reset method may be incorporated in the image sensor.

Abstract: The present technology relates to a solid-state imaging device, an electronic apparatus, and an AD converter that are capable of suppressing the occurrence of an error in AD conversion results. The solid-state imaging device includes a pixel section having a plurality of pixels, a comparator for comparing a pixel signal outputted from the pixels with a reference signal, and a counter for counting the time of comparison made by the comparator. The comparator includes a first amplifier for comparing the pixel signal with the reference signal, a second amplifier that has a first transistor and amplifies an output signal of the first amplifier, and a second transistor having the same polarity as the first transistor. A gate of the second transistor is connected to an output end of the first amplifier, and a source and a drain of the second transistor are connected to the same fixed potential as a source of the first transistor. The present technology is applicable, for example, to a CMOS image sensor.

Abstract: An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.