Patents by Inventor Shoichiro OMAE

Shoichiro OMAE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079372
    Abstract: A semiconductor device is to be arranged adjacent to a cooler in a predetermined direction. The semiconductor device includes a semiconductor element having main electrodes on opposite faces thereof, first and second substrates interposing the semiconductor element therebetween, and a conductive spacer interposed between the second substrate and the semiconductor element. Each of the first and second substrates includes an insulating base member, a front-face metal body connected to a corresponding main electrode, and a back-face metal body. A thickness of a part of the semiconductor device on the first substrate side from the semiconductor element is referred to as T1, and a thickness of a part of the semiconductor device on the second substrate side from the semiconductor element is referred to as T2. A relationship of T1?T2 is satisfied.
    Type: Application
    Filed: November 8, 2023
    Publication date: March 7, 2024
    Inventors: SHOICHIRO OMAE, TOMOMI OKUMURA, TAKANORI KAWASHIMA
  • Patent number: 11908778
    Abstract: A semiconductor module includes: a semiconductor element having a first main electrode and a second main electrode; a first conductive member and a second conductive member connected to the first main electrode and the second main electrode, respectively, and placed to sandwich the semiconductor element; and a main terminal including a first main terminal continuous from the first conductive member and a second main terminal continuous from the second conductive member. The main terminal has a facing portion, a non-facing portion, a first connection portion, and a second connection portion. In a width direction, a formation position of the second connection portion overlaps with a formation position of the first connection portion.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: February 20, 2024
    Assignee: DENSO CORPORATION
    Inventors: Hiroshi Ishino, Ryota Miwa, Shoichiro Omae, Takuo Nagase
  • Patent number: 11887905
    Abstract: The semiconductor device includes a semiconductor element having first and second main electrodes, first and second substrates connected to the first and second main electrodes, respectively, first and second main terminals connected to the first and second main electrodes via the first and second substrates, respectively, and a bonding member. The bonding member is interposed between the first and second main electrodes and between the first and second substrates, respectively. At least one of the first and second main terminals includes a plurality of terminals. The first and second main terminals are alternately arranged in one direction orthogonal to the thickness direction of the semiconductor element. The first and second main terminals are directly bonded to the first and second substrates without the bonding member.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: January 30, 2024
    Assignee: DENSO CORPORATION
    Inventors: Susumu Yamada, Shoichiro Omae, Takuo Nagase
  • Publication number: 20240032265
    Abstract: A power card, which is to be aligned in a height direction with a cooling unit in which a refrigerant flows in an inner space extending in a lateral direction, includes a plurality of switches, a resin portion, and a plurality of external connection terminals. The switches are aligned in a vertical direction perpendicular to each of the lateral direction and the height direction. The resin portion covers each of the switches. The external connection terminals are electrically connected to the respective switches and each have a portion exposed from the resin portion.
    Type: Application
    Filed: October 5, 2023
    Publication date: January 25, 2024
    Applicant: DENSO CORPORATION
    Inventors: Yuta HASHIMOTO, Tomohisa SANO, Shoichiro OMAE, Takanori KAWASHIMA
  • Publication number: 20220392834
    Abstract: A semiconductor device includes a semiconductor element having a surface on which a first electrode and a second electrode are disposed, a conductor plate having a surface facing the surface of the semiconductor element and electrically connected to the first electrode, an insulating layer disposed on the surface of the conductor plate and covers a part of the surface of the conductor plate, and a conductor circuit pattern disposed on the insulating layer. The conductor circuit pattern has at least one conductor line electrically connected to the semiconductor element. The at least one conductor line includes a conductor line electrically connected to the second electrode.
    Type: Application
    Filed: August 12, 2022
    Publication date: December 8, 2022
    Inventors: TAKUYA KADOGUCHI, TAKANORI KAWASHIMA, SHINJI HIRAMITSU, SHOICHIRO OMAE
  • Patent number: 11456238
    Abstract: A semiconductor device configures one arm of an upper-lower arm circuit, and includes: a semiconductor element that includes a first main electrode and a second main electrode, wherein a main current between the first main electrode and the second main electrode; and multiple main terminals that include a first main terminal connected to the first main electrode and a second main terminal connected to the second main electrode. The first main terminal and the second main terminal are placed adjacent to each other; A lateral surface of the first main terminal and a lateral surface of the second main terminal face each other in one direction orthogonal to a thickness direction of the semiconductor element.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: September 27, 2022
    Assignee: DENSO CORPORATION
    Inventors: Kosuke Kamiya, Ryota Tanabe, Tomohisa Sano, Takuo Nagase, Hiroshi Ishino, Shoichiro Omae
  • Publication number: 20220278006
    Abstract: A semiconductor device includes a first insulating circuit board, a semiconductor element on the first insulating circuit board, and an encapsulating body. The first insulating circuit board includes a first insulating substrate, and a first inner conductor layer, and a first outer conductor layer. The first inner conductor layer is electrically connected to a first electrode of the semiconductor element inside of the encapsulating body. The first outer conductor layer is exposed from a surface of the encapsulating body. The first inner conductor layer has a first thin-wall portion a thickness of which reduces toward an outer side, along an outer peripheral edge of the first inner conductor layer with a first width. The first outer conductor layer (i) does not have or (ii) has a second thin-wall portion along the outer peripheral edge of the first outer conductor layer with a second width.
    Type: Application
    Filed: May 17, 2022
    Publication date: September 1, 2022
    Inventors: Akinori SAKAKIBARA, Takanori KAWASHIMA, Shingo TSUCHIMOCHI, Shoichiro OMAE
  • Publication number: 20210407881
    Abstract: A semiconductor device includes: a semiconductor element having a first main electrode and a second main electrode; a first heat dissipation member and a second heat dissipation member; and a lead frame including a first main terminal connected to the first heat dissipation member and a second main terminal connected to the second main electrode. The second main terminal includes a connection portion connected with the second main electrode, a facing portion extending from the connection portion and facing the first heat dissipation member, and a non-facing portion. The non-facing portion and the first main terminal are arranged in a direction orthogonal to a thickness direction. A side surface of the first main terminal and a side surface of the non-facing portion of the second main terminal face each other.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 30, 2021
    Inventors: Shoichiro OMAE, Hiroshi ISHINO
  • Publication number: 20210407876
    Abstract: The semiconductor device includes a semiconductor element having first and second main electrodes, first and second substrates connected to the first and second main electrodes, respectively, first and second main terminals connected to the first and second main electrodes via the first and second substrates, respectively, and a bonding member. The bonding member is interposed between the first and second main electrodes and between the first and second substrates, respectively. At least one of the first and second main terminals includes a plurality of terminals. The first and second main terminals are alternately arranged in one direction orthogonal to the thickness direction of the semiconductor element. The first and second main terminals are directly bonded to the first and second substrates without the bonding member.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 30, 2021
    Inventors: SUSUMU YAMADA, SHOICHIRO OMAE, TAKUO NAGASE
  • Publication number: 20210407892
    Abstract: A semiconductor module includes: a semiconductor element having a first main electrode and a second main electrode; a first conductive member and a second conductive member connected to the first main electrode and the second main electrode, respectively, and placed to sandwich the semiconductor element; and a main terminal including a first main terminal continuous from the first conductive member and a second main terminal continuous from the second conductive member. The main terminal has a facing portion, a non-facing portion, a first connection portion, and a second connection portion. In a width direction, a formation position of the second connection portion overlaps with a formation position of the first connection portion.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 30, 2021
    Inventors: Hiroshi ISHINO, Ryota MIWA, Shoichiro OMAE, Takuo NAGASE
  • Publication number: 20210143088
    Abstract: A semiconductor device configures one arm of an upper-lower arm circuit, and includes: a semiconductor element that includes a first main electrode and a second main electrode, wherein a main current between the first main electrode and the second main electrode; and multiple main terminals that include a first main terminal connected to the first main electrode and a second main terminal connected to the second main electrode. The first main terminal and the second main terminal are placed adjacent to each other; A lateral surface of the first main terminal and a lateral surface of the second main terminal face each other in one direction orthogonal to a thickness direction of the semiconductor element.
    Type: Application
    Filed: January 22, 2021
    Publication date: May 13, 2021
    Applicant: DENSO CORPORATION
    Inventors: Kosuke KAMIYA, Ryota TANABE, Tomohisa SANO, Takuo NAGASE, Hiroshi ISHINO, Shoichiro OMAE