Patents by Inventor Shousaku Ishihara

Shousaku Ishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060239855
    Abstract: A hybrid mounting method using a Pb-free solder alloy including a reflow soldering step of soldering a surface mounting component 2 to at least the upper surface of a circuit board 1 using a Pb-free solder paste comprising an alloy based on Sn-(1-4)Ag-(0-1)Cu-(7-10)In (unit, mass %)-based alloy, an insertion step of inserting a lead or a terminal of an insertion mounting component 5 into a through hole perforated through the circuit board 1 from the upper surface thereof, a flux coating step, a preheating step, and a flow soldering step of spraying a jet flow 3 of Pb-free solder to the lower surface of the circuit board 1 preheated by the preheating step, thereby flow soldering the lead or the terminal of an insertion mounting component 5 to the circuit board.
    Type: Application
    Filed: July 1, 2004
    Publication date: October 26, 2006
    Inventors: Tetsuya Nakatsuka, Nobuhide Takano, Tadayuki Sugahara, Tomoyuki Omura, Toshio Saeki, Kouji Serizawa, Shousaku Ishihara
  • Patent number: 6118671
    Abstract: Ceramic circuit substrate which is sintered at 900 to 1,050.degree. C. and have low relative dielectric constant, thermal expansion coefficient comparable to that of silicon, and high bending strength, and a method of manufacturing are provided by using a glass with a softening point of 850 to 1,100.degree. C., that is, a glass having a composition included in an area in FIG. 1 (triangular composition diagram of SiO.sub.2 --B.sub.2 O.sub.3 --R.sub.2 O, a composition is represented by the position of a small circle, the number in a small circle represents the composition number) defined with lines connecting points representing the first, third, tenth, eleventh, and fourth compositions respectively as raw material.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: September 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Masahide Okamoto, Masato Nakamura, Kousaku Morita, Shousaku Ishihara, Fumikazu Tagami, Norio Sengoku, Tsuyoshi Fujita, Fumiyuki Kobayashi
  • Patent number: 5925444
    Abstract: A multilayer ceramic substrate comprising at least one ceramic layer made by laminating at least one ceramic green sheet layer and conductor layers formed on surfaces of the at least one ceramic green sheet layer into laminates and by sintering the resulting laminates. Each ceramic green sheet layer comprises a ceramic precursor composition comprising (I) 100 parts by weight of ceramic fine powder having an average particle diameter of 10 microns or less as component (C) and (II) 5 to 30 parts by weight, based on 100 parts by weight of the ceramic fine powder, of an organic binder for bonding the ceramic fine powder. The organic binder comprises (i) 100 parts by weight of a water insoluble polymer of at least one vinyl monomer as a major component of the organic binder, as component (A), and (ii) 1 to 9.5 parts by weight, based on 100 parts by weight of the component (A), of water soluble polymer as component (B).
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: July 20, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Nobuhito Katsumura, Fusaji Shoji, Madoka Kinoshita, Shousaku Ishihara, Tsuyoshi Fujita
  • Patent number: 5825632
    Abstract: Ceramic circuit substrate which is sintered at 900.degree. to 1,050.degree. C. and have low relative dielectric constant, thermal expansion coefficient comparable to that of silicon, and high bending strength, and a method of manufacturing are provided by using a glass with a softening point of 850.degree. to 1,100.degree. C., that is, a glass having a composition included in an area in FIG. 1 (triangular composition diagram of SiO.sub.2 --B.sub.2 O.sub.3 --R.sub.2 O, a composition is represented by the position of a small circle, the number in a small circle represents the composition number) defined with lines connecting points representing the first, third, tenth, eleventh, and fourth compositions respectively as raw material.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: October 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Masahide Okamoto, Masato Nakamura, Kousaku Morita, Shousaku Ishihara, Fumiyuki Kobayashi, Fumikazu Tagami, Norio Sengoku, Tsuyoshi Fujita
  • Patent number: 5503787
    Abstract: According to this method for manufacturing a multilayer glass-ceramic circuit board, a green sheet laminate is fired in a non-oxidizing atmosphere in a first firing step so that a void content of at least 10% is maintained and strength of the ceramic laminate is increased. Then the laminate is fired in an oxidizing atmosphere in a second firing step so that the organic binder contained in the laminate is removed and the residual carbon content is at most 200 ppm. Thereafter the laminate is fired in a reducing atmosphere in a third firing step to reduce the oxidized conductor circuit. Finally, the laminate is fired in a non-oxidizing atmosphere in a fourth firing step to densify the ceramic laminate. The firing temperature in the first, second and third steps is 100.degree.-200.degree. C. lower than the softening point of the glass and the firing temperature in the fourth step is higher than the softening point of the glass and lower than the melting point of the conductor.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: April 2, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hirayoshi Tanei, Shoichi Iwanaga, Shousaku Ishihara, Kousaku Morita
  • Patent number: 4935285
    Abstract: A ceramic substrate for densely integrated semiconductor arrays which is superior in a coefficient of thermal expansion, dielectric constant, strength of metallized bond, and mechanical strength, comprising a sintered body composed essentially of mullite crystals and a non-crystralline binder composed of SiO.sub.2, Al.sub.2 O.sub.3, and MgO, is provided.
    Type: Grant
    Filed: December 6, 1988
    Date of Patent: June 19, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Gyozo Toda, Takashi Kuroki, Shousaku Ishihara, Naoya Kanda, Tsuyoshi Fujita
  • Patent number: 4908696
    Abstract: The present invention relates to a connector structure for soldering a wiring substrate such as a ceramic wiring substrate to a connector provided on a printed board and also pertains to semiconductor device packages using the same. It is an object of the present invention to provide a connector structure which provides highly reliable electrical connection, together with semiconductor device package using the same. The object is attained by soldering a ceramic wiring substrate to a connector which involves a heater.
    Type: Grant
    Filed: September 16, 1987
    Date of Patent: March 13, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Shousaku Ishihara, Hitoshi Yokono, Tsuyoshi Fujita, Ryohei Satoh, Kiyotaka Wasai
  • Patent number: 4817276
    Abstract: A ceramic substrate for densely integrated semiconductor arrays which is superior in a coefficient of thermal expansion, dielectric constant, strength of metallized bond, and mechanical strength, comprising a sintered body composed essentially of mullite crystals and a non-crystalline binder composed of SiO.sub.2, Al.sub.2 O.sub.3, and MgO, is provided.
    Type: Grant
    Filed: April 2, 1986
    Date of Patent: April 4, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Gyozo Toda, Takashi Kuroki, Shousaku Ishihara, Naoya Kanda, Tsuyoshi Fujita
  • Patent number: 4734233
    Abstract: A ceramic wiring substrate and a process for producing the same having a conductive layer, obtained by sintering a conductive paste comprising 85 to 97% by weight of a tungsten powder and 15 to 3% by weight of a sintering additive (for conductive metal) having a specified composition, on a mullite ceramic substrate.
    Type: Grant
    Filed: January 27, 1987
    Date of Patent: March 29, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Gyozo Toda, Takashi Kuroki, Shousaku Ishihara, Tsuyoshi Fujita, Naoya Kanda
  • Patent number: 4576735
    Abstract: An electroconductive molybdenum paste comprising 100 parts by weight of a mixture consisting of 68.0 to 89.2% by weight of molybdenum powders having an average particle size of 0.5 to 10 .mu.m, 10.0 to 27.0% by weight of a solvent, and 0.8 to 5.0% by weight of a binder, 0.5 to 5.0 parts by weight of a gelling agent, and 0.5 to 4.0 parts by weight of a silane coupling agent can firmly fill throughholes of a green sheet without formation of clearances and hollows in the resulting conductors in the throughholes, with better surface roughness of the conductor surfaces in the throughholes, and without development of cracks near the throughholes.
    Type: Grant
    Filed: October 12, 1984
    Date of Patent: March 18, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Kuroki, Tsuyoshi Fujita, Gyozo Toda, Shousaku Ishihara, Yoshiyuki Ohzawa