Patents by Inventor Shrane-Ning Jenq

Shrane-Ning Jenq has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230187378
    Abstract: In a method of manufacturing a semiconductor package, at least one conductive wire is formed on a substrate in a wire bonding process, a ball end of the conductive wire is located above the substrate, a molding material is provided to cover the conductive wire except the ball end, and an EMI shielding layer is formed on the molding material to connect to the ball end. Owing to the ball end is exposed on the molding material, connection area of the EMI shielding layer to the conductive wire is increased to improve connection strength and reliability between the EMI shielding layer and the conductive wire.
    Type: Application
    Filed: November 17, 2022
    Publication date: June 15, 2023
    Inventors: Shrane-Ning Jenq, Chen-Yu Wang, Chin-Tang Hsieh, Shu-Yeh Chang, Lung-Hua Ho
  • Publication number: 20230135424
    Abstract: A package including a first carrier, a seed layer, wires, a die and a molding material is provided. The first carrier is removed to expose the seed layer after disposing a second carrier on the molding material, then the seed layer is removed to expose the wires, and a gold layer is deposited on each of the wires by immersion gold plating, finally a semiconductor device is obtained. The gold layer is provided to protect the wires from oxidation and improve solder joint reliability.
    Type: Application
    Filed: August 26, 2022
    Publication date: May 4, 2023
    Inventors: Shrane-Ning Jenq, Wen-Cheng Hsu, Chen-Yu Wang, Chih-Ming Kuo, Chwan-Tyaw Chen, Lung-Hua Ho
  • Patent number: 10988718
    Abstract: A removal composition and process for cleaning post-chemical mechanical polishing (CMP) contaminants and particles from a microelectronic device having said particles and contaminants thereon. The removal compositions include at least one at least one organic additive; at least one metal chelating agent; and at least one polyelectrolyte. The composition achieves highly efficacious removal of the particles and CMP contaminant material from the surface of the microelectronic device without compromising the low-k dielectric, silicon nitride, and metal containing layers such as tungsten-containing layers.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: April 27, 2021
    Assignee: ENTEGRIS, INC.
    Inventors: Thomas Parson, Shrane-Ning Jenq, Steven Medd, Daniela White, Michael White, Donald Frye
  • Patent number: 10557107
    Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions are substantially devoid of alkali hydroxides, alkaline earth metal hydroxides, and tetramethylammonium hydroxide. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: February 11, 2020
    Assignee: ENTEGRIS, INC.
    Inventors: Laisheng Sun, Peng Zhang, Jun Liu, Steven Medd, Jeffrey A. Barnes, Shrane Ning Jenq
  • Publication number: 20190177671
    Abstract: A removal composition and process for cleaning post-chemical mechanical polishing (CMP) contaminants and particles from a microelectronic device having said particles and contaminants thereon. The removal compositions include at least one at least one organic additive; at least one metal chelating agent; and at least one polyelectrolyte. The composition achieves highly efficacious removal of the particles and CMP contaminant material from the surface of the microelectronic device without compromising the low-k dielectric, silicon nitride, and metal containing layers such as tungsten-containing layers.
    Type: Application
    Filed: March 9, 2017
    Publication date: June 13, 2019
    Inventors: Thomas PARSON, Shrane-Ning JENQ, Steven MEDD, Daniela WHITE, Michael WHITE, Donald FRYE
  • Publication number: 20180251712
    Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions are substantially devoid of alkali hydroxides, alkaline earth metal hydroxides, and tetramethylammonium hydroxide. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.
    Type: Application
    Filed: May 4, 2018
    Publication date: September 6, 2018
    Inventors: Laisheng Sun, Peng Zhang, Jun Liu, Steven Medd, Jeffrey A. Bames, Shrane Ning Jenq
  • Publication number: 20160340620
    Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions are substantially devoid of alkali hydroxides, alkaline earth metal hydroxides, and tetramethylammonium hydroxide. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.
    Type: Application
    Filed: January 29, 2015
    Publication date: November 24, 2016
    Inventors: Laisheng SUN, Peng ZHANG, Jun LIU, Steven MEDD, Jeffrey A. BARNES, Shrane Ning JENQ
  • Publication number: 20150114429
    Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include at least one quaternary base, at least one amine, at least one corrosion inhibitor, and at least one solvent. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device while being compatible with barrier layers.
    Type: Application
    Filed: May 17, 2013
    Publication date: April 30, 2015
    Applicants: ATMI Taiwan Co., Ltd., Advanced Technology Materials, Inc.
    Inventors: Shrane Ning Jenq, Karl E. Boggs, Jun Liu, Nicole Thomas
  • Publication number: 20150045277
    Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include at least one quaternary base, at least one amine, at least one azole corrosion inhibitor, at least one reducing agent, and at least one solvent. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device while being compatible with barrier layers, wherein the barrier layers are substantially devoid of tantalum or titanium.
    Type: Application
    Filed: March 14, 2013
    Publication date: February 12, 2015
    Applicant: Entegris, Inc.
    Inventors: Jun Liu, Trace Quentin Hurd, Laisheng Sun, Steven Medd, Shrane Ning Jenq
  • Patent number: 7393786
    Abstract: A method for manufacturing copper wires on a substrate for a flat panel display device is disclosed. The method comprises following steps: providing a substrate; forming a seed layer on the surface; forming a patterned photoresist on the surface of the seed layer to expose a part of the seed layer; and plating a copper layer on the exposed part of the seed layer. As the copper layer is plated, an electrolyte solution comprises a sulfur-containing compound is used. The angle between the surface of the copper layer and the contact surface of the seed layer is greater than 0 degree and less than 90 degree. Through the method illustrated above, the film step-coverage in the following process can be improved, the generated voids in device can be reduced, the manufacturing steps can be simplified, and the complicated etching process can be avoided.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: July 1, 2008
    Assignee: Quanta Display Inc.
    Inventors: Shrane-Ning Jenq, Hung-Wei Li, Min-Sheng Chu, Chi-Chao Wan, Yung-Yun Wang, Po-Tsun Liu
  • Publication number: 20070128857
    Abstract: A method for manufacturing copper wires on a substrate for a flat panel display device is disclosed. The method comprises following steps: providing a substrate; forming a seed layer on the surface; forming a patterned photoresist on the surface of the seed layer to expose a part of the seed layer; and plating a copper layer on the exposed part of the seed layer. As the copper layer is plated, an electrolyte solution comprises a sulfur-containing compound is used. The angle between the surface of the copper layer and the contact surface of the seed layer is greater than 0 degree and less than 90 degree. Through the method illustrated above, the film step-coverage in the following process can be improved, the generated voids in device can be reduced, the manufacturing steps can be simplified, and the complicated etching process can be avoided.
    Type: Application
    Filed: June 5, 2006
    Publication date: June 7, 2007
    Applicant: Quanta Display Inc.
    Inventors: Shrane-Ning Jenq, Hung-Wei Li, Min-Sheng Chu, Chi-Chao Wan, Yung-Yun Wang, Po-Tsun Liu