Abstract: A transmissive display device includes a circuit substrate, pixel units, first light-shielding structures, a transparent covering layer, a hole filling portion and a cover lens. Each pixel unit includes light emitting diodes. Each first light-shielding structure is disposed corresponding to a corresponding one of the pixel units. Each first light-shielding structure defines first light-transmissive regions. The first light-transmissive regions overlap the light-emitting diodes of the corresponding one of the pixel units. The transparent covering layer surrounds the first light shielding structures. The transparent covering layer has holes. Each hole is located in a corresponding one of the first transparent regions. The hole filling portion is located in the holes.

Abstract: A display panel includes a plurality of driving electrode regions and a plurality of wiring regions connected between the driving electrode regions. A (2n?1)th wiring region extended from a (2n?1)th driving electrode region toward a (2n)th driving electrode region has a wiring extending direction forming a first included angle with an arrangement direction, and a (2n)th wiring region extended from the (2n)th driving electrode region toward a (2n+1)th driving electrode region has a wiring extending direction forming a second included angle with the arrangement direction, and a (2n+1)th wiring region extended from the (2n+1)th driving electrode region toward a (2n+2)th driving electrode region has a wiring extending direction forming a third included angle with the arrangement direction, wherein n is a positive integer. At least one of the first included angle, the second included angle and the third included angle is positive and at least one of them is negative.

Abstract: A pixel detection device includes a data line, a pixel circuit, and a detection circuit. Pixel circuit is coupled to a system high voltage source, a system low voltage source, and a first reference voltage source. Detection circuit is coupled to data line and pixel circuit, and is configured to receive a driving signal and a detection control signal. Detection circuit forms a first detection loop with the system low voltage source and the data line so as to detect whether the pixel circuit is abnormal according to the driving signal and the detection control signal in a first stage. Detection circuit forms a second detection loop with the first reference voltage source, the system low voltage source, the pixel circuit, and the data line so as to detect whether the pixel circuit is abnormal according to the driving signal and the detection control signal in a second stage.

Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.

Abstract: A display panel includes a substrate, a mark structure, a plurality of active elements, and a plurality of light emitting elements. The mark structure is disposed in a mark region of the display panel. The mark structure includes a drilled layer having a plurality of through holes. The active elements are disposed in an active element region of the display panel. Both the mark region and the active element region are located in a display region of the display panel. The light emitting elements are disposed in the display region of the display panel. A first portion in the light emitting elements is overlapped with the mark structure in a normal direction of a surface of the substrate.

Abstract: A display panel includes a plurality of driving electrode regions and a plurality of wiring regions connected between the driving electrode regions. A (2n-1)th wiring region extended from a (2n-1)th driving electrode region toward a (2n)th driving electrode region has a wiring extending direction forming a first included angle with an arrangement direction, and a (2n)th wiring region extended from the (2n)th driving electrode region toward a (2n+1)th driving electrode region has a wiring extending direction forming a second included angle with the arrangement direction, and a (2n+1)th wiring region extended from the (2n+1)th driving electrode region toward a (2n+2)th driving electrode region has a wiring extending direction forming a third included angle with the arrangement direction, wherein n is a positive integer. At least one of the first included angle, the second included angle and the third included angle is positive and at least one of them is negative.

Abstract: A display device includes a light emitting unit, first and second capacitors, and first and second switches. The light emitting unit emits light according to a voltage level of a first node. A first terminal of the first capacitor is coupled to the first node, and a second terminal of the first capacitor is coupled to a second node. A first terminal of the second capacitor is coupled to the second node, and a second terminal of the first capacitor is coupled to the light emitting unit. A first terminal of the first switch is coupled to the first node, and a second terminal of the first switch is coupled to the light emitting unit. The second switch is configured to be turned on before the first switch is turned on, and a first terminal of the second switch is coupled to the first node.

Abstract: A display panel includes a plurality of driving electrode regions and a plurality of wiring regions. The plurality of wiring regions are connected between the driving electrode regions. The driving electrode regions are arranged in sequence along an arrangement direction. A (2n?1)th wiring region extended from a (2n?1)th driving electrode region toward a (2n)th driving electrode region has a wiring extending direction forming a positive included angle with the arrangement direction, and a (2n)th wiring region extended from the (2n)th driving electrode region toward a (2n+1)th driving electrode region has a wiring extending direction forming a negative included angle with the arrangement direction, wherein n is a positive integer.

Abstract: A method of manufacturing a cerium dioxide powder is provided. The method includes mixing a cerium salt, an amine and solvent to form a mixed solution, in which the amine includes a secondary amine, a tertiary amine or a combination thereof, and the tertiary amine is selected from the group consisting of hexamethylenetetramine, triethylenediamine and a combination thereof. A solvothermal reaction of the mixed solution is performed to form the cerium dioxide powder. The cerium dioxide powder manufactured by the method is also provided herein.

Abstract: A driving circuit includes a driving transistor, a capacitor, a reset circuit, a touch sensing electrode, a sensing circuit, and a read circuit. The capacitor is electrically coupled to a gate terminal of the driving transistor. The reset circuit is electrically coupled to the gate terminal of the driving transistor, and the reset circuit is configured to reset the voltage level of the gate terminal of the driving transistor. The sensing circuit is electrically coupled between the touch sensing electrode and the gate terminal of the driving transistor, and the sensing circuit is configured to transmit the voltage level of the touch sensing electrode to the gate terminal of the driving transistor. The read circuit is electrically coupled to the driving transistor, and the read circuit is configured to output a touch sensing signal according to the voltage level of the gate terminal of the driving transistor.

Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.

Abstract: A driving circuit includes a driving transistor, a capacitor, a reset circuit, a touch sensing electrode, a sensing circuit, and a read circuit. The capacitor is electrically coupled to a gate terminal of the driving transistor. The reset circuit is electrically coupled to the gate terminal of the driving transistor, and the reset circuit is configured to reset the voltage level of the gate terminal of the driving transistor. The sensing circuit is electrically coupled between the touch sensing electrode and the gate terminal of the driving transistor, and the sensing circuit is configured to transmit the voltage level of the touch sensing electrode to the gate terminal of the driving transistor. The read circuit is electrically coupled to the driving transistor, and the read circuit is configured to output a touch sensing signal according to the voltage level of the gate terminal of the driving transistor.

Abstract: A display device includes a light emitting unit, first and second capacitors, and first and second switches. The light emitting unit emits light according to a voltage level of a first node. A first terminal of the first capacitor is coupled to the first node, and a second terminal of the first capacitor is coupled to a second node. A first terminal of the second capacitor is coupled to the second node, and a second terminal of the first capacitor is coupled to the light emitting unit. A first terminal of the first switch is coupled to the first node, and a second terminal of the first switch is coupled to the light emitting unit. The second switch is configured to be turned on before the first switch is turned on, and a first terminal of the second switch is coupled to the first node.

Abstract: A pixel array substrate including a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of pixels, a first demultiplexer, a second demultiplexer, a first connecting line and a second connecting line is provided. The substrate has a display area. The first signal lines are arranged on the substrate and define a first row region and a second row region of the display area. The pixels are arranged into a first pixel row and a second pixel row which are respectively disposed in the first row region and the second row region. The first demultiplexer is disposed in the first row region and electrically connected to a part of the second signal lines. The second demultiplexer is disposed in the second row region and electrically connected to another part of the second signal lines. The first connecting line is electrically connected to the first demultiplexer. The second connecting line is electrically connected to the second demultiplexer.

Abstract: A display device includes a pixel driving circuit including a data writing unit, a light emitting unit and a compensation unit. The data writing unit includes first and second capacitors. A first terminal of the first capacitor is coupled to a first node, and a second terminal of the first capacitor is coupled to a second node. A first terminal of the second capacitor is coupled to the first node. The light emitting unit includes a first switch and a light emitting element. A control terminal of the first switch is coupled to the second node, and a first terminal of the first switch is coupled to a second terminal of the second capacitor. The compensation unit includes a second switch. The second switch is coupled to the second node and a second terminal of the first switch.

Abstract: A pixel array substrate including a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of pixels, a first multiplexer, a second multiplexer, a first connecting line and a second connecting line is provided. The substrate has a display area. The first signal lines are arranged on the substrate and define a first row region and a second row region of the display area. The pixels are arranged into a first pixel row and a second pixel row which are respectively disposed in the first row region and the second row region. The first multiplexer is disposed in the first row region and electrically connected to a part of the second signal lines. The second multiplexer is disposed in the second row region and electrically connected to another part of the second signal lines. The first connecting line is electrically connected to the first multiplexer. The second connecting line is electrically connected to the second multiplexer.

Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed.

Abstract: A touch display panel includes a pixel array, a touch module, and a multiplexer circuit. The pixel array includes a plurality of pixels, a plurality of gate lines, and a plurality of source lines. The pixels are electrically coupled to the source lines and the gate lines. The touch module and the pixel array are overlapped. The multiplexer circuit is coupled between all of the source lines and a source driver and has a plurality of multiplexers. The multiplexers are respectively coupled to n source lines and respectively include a plurality of switches and a bypass trace. The switches are respectively coupled between the first source line to the (n?1)th source line of the n source lines and the source drivers. The bypass trace is coupled between the nth source line of the n source lines and the source driver.

Abstract: A pixel circuit includes a first switch, a storage circuit, a second switch, and a liquid crystal capacitor. The first node of the first switch is configured to receive a data signal, and the second node of the first switch is coupled with a first node point. The storage circuit is coupled with the first node point, and configured to receive a common voltage. The first node of the second switch is coupled with the storage circuit, and the second node of the second switch is configured to receive a boost signal. The liquid crystal capacitor is coupled between the first node point and the storage circuit. In response to the first switch is conducted, the second switch is conducted, or in response to the second switch is conducted, the first switch is conducted.

Abstract: A method for fabricating an array substrate is provided. A gate insulation layer, first and second gates and a first interlayered insulation layer are formed on first and second active layers in order. A photolithography and etching process is performed by using a photo mask to form first to fourth contact holes in the gate insulation layer and the first interlayered insulation layer. First and second sources and first and second drains which are respectively connected to the first and second active layers through the first to fourth contact holes are formed. A second interlayered insulation layer is formed.