Patents by Inventor Shuhei IRIYAMA

Shuhei IRIYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11183483
    Abstract: A multichip module provided with a first substrate, a first semiconductor chip, a second substrate and a third substrate. The first semiconductor chip has a first surface provided with a first electrode and a second surface mounted on the first substrate so that the first wiring of a first mount surface of the first substrate is electrically connected to the first electrode. The second substrate has a second mounting surface and a third mounting surface bonded to the first substrate so that the second mounting surface is opposed to the first mounting surface. The third substrate has a fourth mounting surface provided with a second wiring and a fifth mounting surface bonded to the second silicon substrate so that the fourth mounting surface is opposed to the third mounting surface and is mounted with the first semiconductor chip so that the second wiring is electrically connected to the second surface.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: November 23, 2021
    Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Masahiro Kato, Shuhei Iriyama
  • Publication number: 20200273845
    Abstract: A multichip module provided with a first substrate, a first semiconductor chip, a second substrate and a third substrate. The first semiconductor chip has a first surface provided with a first electrode and a second surface mounted on the first substrate so that the first wiring of a first mount surface of the first substrate is electrically connected to the first electrode. The second substrate has a second mounting surface and a third mounting surface bonded to the first substrate so that the second mounting surface is opposed to the first mounting surface. The third substrate has a fourth mounting surface provided with a second wiring and a fifth mounting surface bonded to the second silicon substrate so that the fourth mounting surface is opposed to the third mounting surface and is mounted with the first semiconductor chip so that the second wiring is electrically connected to the second surface.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Inventors: Masahiro KATO, Shuhei IRIYAMA