Patents by Inventor Shuji Nakamura

Shuji Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9828695
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: November 28, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20170327969
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate. The miscut angle towards the <000-1> direction is 0.75° or greater miscut and less than 27° miscut towards the <000-1> direction. Surface undulations are suppressed and may comprise faceted pyramids. A device fabricated using the film is also disclosed. A nonpolar III-nitride film having a smooth surface morphology fabricated using a method comprising selecting a miscut angle of a substrate upon which the nonpolar III-nitride films are grown in order to suppress surface undulations of the nonpolar III-nitride films. A nonpolar III-nitride-based device grown on a film having a smooth surface morphology grown on a miscut angle of a substrate which the nonpolar III-nitride films are grown. The miscut angle may also be selected to achieve long wavelength light emission from the nonpolar film.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 16, 2017
    Applicant: The Regents of the University of California
    Inventors: Kenji Iso, Hisashi Yamada, Makoto Saito, Asako Hirai, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9793435
    Abstract: A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 17, 2017
    Assignees: The Regents of the University of California, Japan Science and Technology Agency
    Inventors: Robert M. Farrell, Jr., Troy J. Baker, Arpan Chakraborty, Benjamin A. Haskell, P. Morgan Pattison, Rajat Sharma, Umesh K. Mishra, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9773704
    Abstract: A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: September 26, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20170271103
    Abstract: A key switch device includes: an operation member to be depressed; a switch disposed below the operation member; a reaction force generating member that is provided between the operation member and the switch, performs elastic buckling deformation by depression of the operation member, gives a reaction force according to the elastic buckling deformation to the operation member; and a depression member that is provided between the operation member and the switch, and depresses the switch; wherein the reaction force generating member includes a supporter that supports the depression member.
    Type: Application
    Filed: June 1, 2017
    Publication date: September 21, 2017
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Takeshi NISHINO, Shuji Nakamura, Akihiko Takemae, Tamotsu Koike
  • Patent number: 9741507
    Abstract: A key switch device includes: an operation member to be depressed; a switch disposed below the operation member; a reaction force generating member that is provided between the operation member and the switch, performs elastic buckling deformation by depression of the operation member, gives a reaction force according to the elastic buckling deformation to the operation member; and a depression member that is provided between the operation member and the switch, and depresses the switch; wherein the reaction force generating member includes a supporter that supports the depression member.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: August 22, 2017
    Assignee: FUJITSU COMPONENT LIMITED
    Inventors: Takeshi Nishino, Shuji Nakamura, Akihiko Takemae, Tamotsu Koike
  • Publication number: 20170236807
    Abstract: III-V micro light-emitting diodes (LEDs) are fabricated using a photoelectrochemical (PEC) etch. A sacrificial layer and III-V device layers are epitaxially grown on a host substrate, wherein the III-V device layers are patterned to form the micro-LEDs. The sacrificial layer is removed by a photoelectrochemical (PEC) etch, so as to fully or partially separate the micro-LEDs from the substrate, before or after the micro-LEDs are bonded to a submount or intermediate substrate. The micro-LEDs may be bonded to a submount with a polymer film deposited thereon, wherein the polymer film with the micro-LEDs is subsequently delaminated from the submount. Alternatively, the intermediate substrate may be a transfer medium, wherein the micro-LEDs are separated from the host substrate by mechanical fracturing, and then bonded to a second substrate, after which the intermediate substrate is removed, wherein a third substrate may be bonded to exposed surfaces of the transferred micro-LEDs.
    Type: Application
    Filed: April 28, 2017
    Publication date: August 17, 2017
    Applicant: The Regents of the University of California
    Inventors: David Hwang, Nathan G. Young, Ben Yonkee, Burhan K. Saifaddin, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9689419
    Abstract: A threaded portion with thread groove formed and non-threaded portion without the thread groove are prepared on rod-like portion of stud, and non-threaded diameter-increasing portion whose outer diameter is increasing toward thread ridge of screw portion with thread groove formed and non-threaded small diameter portion connecting to small diameter region of non-threaded diameter-increasing portion and having same diameter as that of small diameter region are prepared at threaded portion side edge of non-threaded portion. A holder is provided with stud-receiving hole which receives the rod-like portion, a first locking portion and a second locking portion. The second locking portion is engaged with the non-threaded small diameter portion in a fixedly holding status, and the second locking portion is engaged with the non-threaded diameter-increasing portion in a status that the holder is moved for a predetermined amount in a direction away from the fixedly holding status.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: June 27, 2017
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, NEWFREY LLC
    Inventors: Shuji Nakamura, Hiroto Matsuno
  • Patent number: 9640947
    Abstract: A III-Nitride based Vertical Cavity Surface Emitting Laser (VCSEL), wherein a cavity length of the VCSEL is controlled by etching.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: May 2, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9551088
    Abstract: A method of growing high-quality, group-III nitride, bulk single crystals. The group III-nitride bulk crystal is grown in an autoclave in supercritical ammonia using a source material or nutrient that is a group III-nitride polycrystals or group-III metal having a grain size of at least 10 microns or more and a seed crystal that is a group-III nitride single crystal. The group III-nitride polycrystals may be recycled from previous ammonothermal process after annealing in reducing gas at more then 600° C. The autoclave may include an internal chamber that is filled with ammonia, wherein the ammonia is released from the internal chamber into the autoclave when the ammonia attains a supercritical state after the heating of the autoclave, such that convection of the supercritical ammonia transfers source materials and deposits the transferred source materials onto seed crystals, but undissolved particles of the source materials are prevented from being transferred and deposited on the seed crystals.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: January 24, 2017
    Assignee: The Regents of the University of California
    Inventors: Kenji Fujito, Tadao Hashimoto, Shuji Nakamura
  • Patent number: 9515240
    Abstract: A method for increasing the luminous efficacy of a white light emitting diode (WLED), comprising introducing optically functional interfaces between an LED die and a phosphor, and between the phosphor and an outer medium, wherein at least one of the interfaces between the phosphor and the LED die provides a reflectance for light emitted by the phosphor away from the outer medium and a transmittance for light emitted by the LED die. Thus, a WLED may comprise a first material which surrounds an LED die, a phosphor layer, and at least one additional layer or material which is transparent for direct LED emission and reflective for the phosphor emission, placed between the phosphor layer and the first material which surrounds the LED die.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: December 6, 2016
    Assignee: The Regents of the University of California
    Inventors: Frederic S. Diana, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 9513825
    Abstract: Storage system: wherein processor number information includes at least one logical unit number and at least one processor number of storage nodes; wherein transfer list index/processor number information includes a processor number for identifying a processor from among processors of the plurality of storage nodes, and index information for identifying a transfer list including instruction which the processor sends to the protocol processor; wherein a local router determines a first processor from among the processors of the plurality of storage nodes which is to be a transfer destination of a write request based on processor number information in response to the write request from the host computer through the protocol processor; wherein the first processor generates and sends to the protocol processor a first transfer list which includes instruction for processing, and generates first index information which is an index of the first transfer list upon receiving the write request.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: December 6, 2016
    Assignee: HITACHI, LTD.
    Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
  • Patent number: 9495105
    Abstract: A system includes a plurality of flash memory devices, a processor configured to control read/write requests, and a cache memory configured to store data temporarily.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: November 15, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Nakamura, Kazuhisa Fujimoto, Akira Fujibayashi
  • Publication number: 20160322782
    Abstract: The monolithic integration of optically-pumped and electrically-injected III-nitride light-emitting devices. This structure does not involve the growth of p-type layers after an active region for a first III-nitride light-emitting device, and thus avoids high temperature growth steps after the fabrication of the active region for the first III-nitride light emitting device. Since electrical injection in such a structure cannot be possible, a second III-nitride light-emitting device is used to optically pump the first III-nitride light emitting device. This second III-nitride light emitting device emits light at a shorter wavelength region of the optical spectrum than the first III-nitride light emitting device, so that it can be absorbed by the active region of the first III-nitride light-emitting device, which in turn emits light at a longer wavelength region of the optical spectrum than the second III-nitride light emitting device.
    Type: Application
    Filed: December 30, 2014
    Publication date: November 3, 2016
    Applicant: The Regents of the University of California
    Inventors: Robert M. Farrell, Shuji Nakamura, Claude C.A. Weisbuch
  • Publication number: 20160307801
    Abstract: A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.
    Type: Application
    Filed: June 22, 2016
    Publication date: October 20, 2016
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20160235906
    Abstract: A blood reservoir (20) for storing blood includes a first storage section (21), a second storage section (22), and a third storage section (23) that is provided between the first storage section and the second storage section, and communicates with the first storage section and the second storage section. A volume of the blood reservoir (20) can be adjusted by changing the amount of expansion or contraction of a bellows structure (28) using a bellows adjustment mechanism (83, 93).
    Type: Application
    Filed: August 21, 2014
    Publication date: August 18, 2016
    Applicants: JMS CO., LTD., JIMRO CO., LTD.
    Inventors: Hiroaki TAKUWA, Satoshi HIRAI, Yoshiki TANAKA, Shuji NAKAMURA, Katsuyuki SADO, Kenta KANEDA
  • Publication number: 20160230312
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an ?-axis direction comprising a 0.15° or greater miscut angle towards the ?-axis direction and a less than 30° miscut angle towards the ?-axis direction.
    Type: Application
    Filed: April 20, 2016
    Publication date: August 11, 2016
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Patent number: 9396943
    Abstract: A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: July 19, 2016
    Assignee: The Regents of the University of California
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20160194781
    Abstract: A method and apparatus for growing a Group-III nitride crystal using multiple interconnected reactor vessels to modify growth conditions during the ammonothermal growth of the Group-III nitride crystal, such that, by combining two or more vessels, it is possible to modify the conditions under which the Group-III nitride crystals are grown. In addition, the reactor vessel may use carbon fiber containing materials encapsulating oxide ceramic materials as structural elements to contain the materials for growing the Group-III nitride crystals at pressures or temperatures necessary for growth of the Group-III nitride crystals.
    Type: Application
    Filed: August 29, 2014
    Publication date: July 7, 2016
    Applicant: The Regents of the University of California
    Inventors: Siddha Pimputkar, Shuji Nakamura, James S. Speck
  • Publication number: 20160196077
    Abstract: Storage system: wherein processor number information includes at least one logical unit number and at least one processor number of storage nodes; wherein transfer list index/processor number information includes a processor number for identifying a processor from among processors of the plurality of storage nodes, and index information for identifying a transfer list including instruction which the processor sends to the protocol processor; wherein a local router determines a first processor from among the processors of the plurality of storage nodes which is to be a transfer destination of a write request based on processor number information in response to the write request from the host computer through the protocol processor; wherein the first processor generates and sends to the protocol processor a first transfer list which includes instruction for processing, and generates first index information which is an index of the first transfer list upon receiving the write request.
    Type: Application
    Filed: September 22, 2014
    Publication date: July 7, 2016
    Inventors: Shuji NAKAMURA, Akira FUJIBAYASHI, Mutsumi HOSOYA