Abstract: According to one embodiment, semiconductor device includes a first terminal, a second terminal, a first transistor, a second transistor, a third transistor, a fourth transistor, and a control circuit. The control circuit is configured to control the first transistor, the second transistor, the third transistor, and the fourth transistor. The control circuit is configured to, when supply of the first voltage to the third node is stopped, turn the second transistor from an off state to an on state, turn the third transistor and the fourth transistor from an on state to an off state, and after a first period passes, turn the first transistor from an off state to an on state.

Abstract: In general, according to one embodiment, a semiconductor device includes a first terminal, a second terminal and a first circuit. The first circuit includes a first switching element, a second switching element and a first resistor. The gate of the first switching element is coupled between the first node and the second terminal. The first resistor and the second switching element are coupled in series between the first node and the second terminal. The first circuit is configured to change the first switching element and the second switching element from an off state to an on state when supply of the first voltage to the first node is stopped.

Abstract: In general, according to one embodiment, a semiconductor device includes a first terminal, a second terminal and a first circuit. The first circuit includes a first switching element, a second switching element and a first resistor. The gate of the first switching element is coupled between the first node and the second terminal. The first resistor and the second switching element are coupled in series between the first node and the second terminal. The first circuit is configured to change the first switching element and the second switching element from an off state to an on state when supply of the first voltage to the first node is stopped.

Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, and a first circuit. The first circuit includes a first switch element having a first end coupled to a first node to which a first voltage is supplied, a second end coupled to the first terminal, and a gate coupled between the first node and the second terminal, and a second switch element coupled between the first node and the first terminal. The first circuit is configured to switch the first switch element from OFF state to ON state when supply of the first voltage is interrupted, and switch the second switch element from OFF state to ON state while maintaining the first switch element in ON state when a voltage of the first terminal changes to a second voltage.

Abstract: According to one embodiment, a semiconductor device includes a first terminal, a second terminal, and a first circuit. The first circuit includes a first switch element having a first end coupled to a first node to which a first voltage is supplied, a second end coupled to the first terminal, and a gate coupled between the first node and the second terminal, and a second switch element coupled between the first node and the first terminal. The first circuit is configured to switch the first switch element from OFF state to ON state when supply of the first voltage is interrupted, and switch the second switch element from OFF state to ON state while maintaining the first switch element in ON state when a voltage of the first terminal changes to a second voltage.

Abstract: According to an embodiment, an input-voltage control circuit outputs an input voltage when a control signal is in an enabled state. A backflow prevention circuit includes a first transistor and a first body diode. The first transistor turns on to output the input voltage to the input-voltage control circuit when the control signal is in the enabled state. The first body diode is formed in the first transistor and having an anode connected to the first terminal of the first transistor and a cathode connected to a second terminal of the first transistor. The booster circuit receives the input voltage outputted from the input-voltage control circuit and boosts the input voltage to generates a boosted voltage. The boosted voltage is outputted from the driver circuit and supplied to the control terminal of an external output transistor.

Abstract: According to an embodiment, an input-voltage control circuit outputs an input voltage when a control signal is in an enabled state. A backflow prevention circuit includes a first transistor and a first body diode. The first transistor turns on to output the input voltage to the input-voltage control circuit when the control signal is in the enabled state. The first body diode is formed in the first transistor and having an anode connected to the first terminal of the first transistor and a cathode connected to a second terminal of the first transistor. The booster circuit receives the input voltage outputted from the input-voltage control circuit and boosts the input voltage to generates a boosted voltage. The boosted voltage is outputted from the driver circuit and supplied to the control terminal of an external output transistor.

Abstract: According to one embodiment, an operational amplifier includes first and second input terminals, an output terminal, differential circuitry, and output circuitry. The differential circuitry including first and second nodes, and first and second transistors. The output circuitry including third through fifth nodes, and third through eighth transistors. The third transistor being coupled to the first node at a gate and coupled to the third node at one end. The fourth transistor being coupled to the second node at a gate and coupled to the fourth node at one end. The fifth transistor being coupled to the fourth node at a gate and coupled to the third node at one end. The sixth transistor being coupled to the fourth node at each of a gate and one end.

Abstract: According to one embodiment, a gate control circuit includes a controller, a delay circuit, a power circuit, a boosting circuit, a first transistor, and a control circuit. The controller outputs first and second control signals based on a control signal from outside. The delay circuit delays the first control signal. The power circuit is capable of controlling a power supply voltage to be output based on the delayed first control signal. The boosting circuit is capable of boosting and outputting an input voltage. The first transistor has one end connected to an output node of the boosting circuit, and the other end grounded. The control circuit is capable of controlling a gate voltage of the first transistor based on the second control signal.

Abstract: According to one embodiment, a gate control circuit includes a controller, a delay circuit, a power circuit, a boosting circuit, a first transistor, and a control circuit. The controller outputs first and second control signals based on a control signal from outside. The delay circuit delays the first control signal. The power circuit is capable of controlling a power supply voltage to be output based on the delayed first control signal. The boosting circuit is capable of boosting and outputting an input voltage. The first transistor has one end connected to an output node of the boosting circuit, and the other end grounded. The control circuit is capable of controlling a gate voltage of the first transistor based on the second control signal.

Abstract: Externally input voltages IN(−) and IN(+) are input to the input terminal of a differential amplifier unit (1) not directly, but after being shifted by voltage shift units (2, 3). The input voltages IN(−) and IN(+) are decreased by &agr; when they are at high level, and by &bgr; when they are at low level. In this case, &agr;>&bgr;. The voltage difference of the external input voltage IN between high and low levels is relatively reduced, and then the external input voltage IN is input to the differential amplifier unit (1). This widens the substantial in-phase input voltage range in the differential amplifier unit (1).

Abstract: Externally input voltages IN(−) and IN(+) are input to the input terminal of a differential amplifier unit (1) not directly, but after being shifted by voltage shift units (2, 3). The input voltages IN(−) and IN(+) are decreased by &agr; when they are at high level, and by &bgr; when they are at low level. In this case, &agr;>&bgr;. The voltage difference of the external input voltage IN between high and low levels is relatively reduced, and then the external input voltage IN is input to the differential amplifier unit (1). This widens the substantial in-phase input voltage range in the differential amplifier unit (1).