Patents by Inventor Shuji Yoshimura

Shuji Yoshimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200010678
    Abstract: Disclosed is a conductive polyamide resin composition that excels not only in electroconductivity, but also in fuel resistance, particularly resistance against alcohol-containing fuel, and further excels in fluidity and moldability, and is capable of yielding a molded article with high impact resistance, the conductive polyamide resin composition including: 84 to 40% by mass of a polyamide resin (A); 5 to 30% by mass of conductive carbon black (B); 3 to 30% by mass of an ethylene-?-olefin copolymer (C) that has a reactive functional group capable of reacting with a terminal group of polyamide resin and/or an amido group on a principal chain of polyamide resin; and 1 to 20% by mass of a conductive polyethylene resin (D).
    Type: Application
    Filed: February 6, 2018
    Publication date: January 9, 2020
    Applicant: TOYOBO CO., LTD.
    Inventors: Shuji KUBOTA, Nobuhiro YOSHIMURA, Yuhei FUKUMOTO, Kazuki IWAMURA, Kiyofumi SAKAI, Osamu MABUCHI
  • Publication number: 20190373385
    Abstract: A sound pickup device according to this embodiment includes a microphone part placed at a sound pickup position in close proximity to an ear hole without blocking an ear canal, and positioned so as to face outside of the ear canal, and a wire having flexibility and extending to the sound pickup position. Further, in this embodiment, at least part of the wire is formed along an auricle.
    Type: Application
    Filed: August 12, 2019
    Publication date: December 5, 2019
    Inventors: Hiroshi UCHIDA, Hisako MURATA, Takahiro GEJO, Yumi FUJII, Kuniaki TAKACHI, Masaya KONISHI, Takayuki UCHIDA, Satoshi YOSHIMURA, Shuji TANIFUJI
  • Patent number: 5875177
    Abstract: A sending trunk on the input side of an ATM switch is equipped with a test cell generating section, and a receiving trunk on the output side of the ATM switch is equipped with a test cell detecting section. The test cell generating section includes a unit for setting a test cell identifier in the header of a test cell and a unit for generating pieces of data with regularity in the information field of the test cell. The test cell detecting section includes a unit for detecting the test cell identifier from the header of a cell received and a unit for detecting regularity from data in the information field of the cell received. When a test cell is transmitted, the test cell detecting section evaluates the result of a test on the basis of the result of detection of the test cell identifier from the header of the test cell and the result of detection of the regularity from data in the information field of the test cell.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: February 23, 1999
    Assignee: Fujitsu Limited
    Inventors: Shiro Uriu, Yoshihiro Uchida, Shuji Yoshimura
  • Patent number: 5691977
    Abstract: In a data access device for writing into or read from a data conversion table on the basis of a clock signal extracted from a cell being transferred over a line, a clock signal generator of the invention generates a second clock signal which differs from the first clock signal extracted from an incoming cell. A write/read control unit writes data into or reads data for maintenance from the data conversion table on the basis of either the first clock signal or the second clock signal when the line is normal. In the event of the occurrence of a failure in the line, on the other hand, the write/read control circuit permits the data conversion table to be written into or read from for maintenance on the basis of the second clock signal.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 25, 1997
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Masami Murayama, Shiro Uriu, Tadashi Hoshino
  • Patent number: 5648963
    Abstract: An ATM exchange which is comprised of a multistage cascade connection of ATM switches of self-routing module structures which are provided with a plurality of outgoing lines and incoming lines, wherein it provides at the output side and the input side of the ATM switches output side conversion interfaces and input side conversion interfaces both for connection of adjoining ATM switches and uses optical cables to connect the output side interfaces and input side interfaces facing thereto. By this, it is possible to maintain the correct exchange operation even if the length of the transfer lines (outgoing lines and incoming lines) laid between ATM switches becomes greater along with extension of the ATM switches in the exchange.
    Type: Grant
    Filed: October 7, 1992
    Date of Patent: July 15, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Miyake, Yasuhiro Aso, Shuji Yoshimura
  • Patent number: 5636222
    Abstract: When broadcast is executed in an ATM mode, a subscriber is assigned a path and a channel as information by a central controller of a switching unit, and the information is added to a cell to be transmitted to the switching unit through a subscriber line. The switching unit comprises the central controller, a tag information adder, and a self-routing switch. The self-routing switch comprises a plurality of input lines and output lines, and unit switches provided for each input line corresponding to each of the output lines. The tag information adder adds routing information for the self-routing switch to a cell to be transmitted to the self-routing switching. The routing information comprises a set of bits corresponding to each output line, and the tag information adder adds to the cell the routing information in which a bit corresponding to an output line for transmitting the cell is set to a predetermined logical value.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: June 3, 1997
    Assignee: Fujitsu Limited
    Inventors: Shiro Uriu, Shuji Yoshimura, Satoshi Kakuma
  • Patent number: 5602826
    Abstract: A test system exactly checks the integrity of data in an ATM system, and generates a test cell of a desired band. In the first aspect of the system in which data stored in an ATM cell are transmitted in an 8-bit parallel format in the ATM system, a test cell generating device connected to an input line outputs a test cell having 1 in all of the eight bits or having zero in all of the eight bits, and the test cell confirming device connected to an output line of the ATM switch detects the above described data. In the second aspect, the test cell generating device provided in an input trunk outputs a test cell of a desired band based on a ratio between two optional integers N and n (N.gtoreq.n), the state of a buffer of the ATM switch is monitored, and a load test is conducted to determine whether or not any cell has been destroyed.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: February 11, 1997
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Shiro Uriu, Satoshi Kakuma
  • Patent number: 5561662
    Abstract: A switch interface unit, a monitor unit, and a control system interface unit are connected as external units to a highway to which a subscriber information processing unit is also connected so that a monitoring process, that is, a special study process, can be simplified and a cost charged for the subscriber information processing unit can be prevented from increasing greatly. Furthermore, in an accounting process, accounting parameters are accumulated in an accounting information accumulating unit for variations on compressed source addresses, not on source addresses. As a result, the accounting information accumulating unit, etc. can be realized with normal circuit elements only.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: October 1, 1996
    Assignee: Fujitus Limited
    Inventors: Satoshi Kakuma, Kazuo Hajikano, Masami Murayama, Shuji Yoshimura, Shiro Uriu, Jin Abe
  • Patent number: 5532682
    Abstract: A control data transmission system controls an electronic switching system with few signal lines. Control data are split into a plurality of fixed-length bit blocks. The control data sequence number specification signals identify the fixed-length bit blocks. The control data sequence number specification signals are paired with corresponding control data signals carrying the contents of one of the fixed-length bit blocks and a control data validity specification signal for validating transmission of the control data. The control data sequence number specification signals are decoded and the contents of respective bit blocks carried by the control data signals are stored according to the decoding result and the control data validity specification signal. When the contents of the fixed-length bit blocks carried by the control data signals for one unit of control data are stored, the control data are analyzed.
    Type: Grant
    Filed: August 23, 1993
    Date of Patent: July 2, 1996
    Assignee: Fujitsu Limited
    Inventors: Masami Murayama, Shuji Yoshimura, Tetsuo Kawamata, Atsushi Yoshioka
  • Patent number: 5524000
    Abstract: A first terminal unit is connected to a line switch via a set of data lines. A second terminal unit is connected to the first terminal unit via a set of data lines. A third terminal unit is connected to the second terminal unit via a set of data lines. Therefore, the terminals are sequentially connected in series. Cells transmitted to the terminals are multiplexed by each terminal and sequentially transmitted upstream, to the third terminal unit, the second terminal unit, and the first terminal unit together with a token. Since the first terminal unit receives a first identification signal from a switch and a second identification signal from downstream, the first terminal unit recognizes that it is the highest order terminal unit, and sends a cell to the switch after separating the cell from a token which is to be returned downstream.
    Type: Grant
    Filed: July 8, 1993
    Date of Patent: June 4, 1996
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Shiro Uriu
  • Patent number: 5521924
    Abstract: On receiving voice data from a subscriber accommodated in a broadband network, a terminal adaptor separately puts the voice data in cells in 8-bit units every 125 .mu.s separately, and transmits the cells by a remote switching unit in the broadband network to subscriber terminal equipment. The subscriber terminal equipment accommodates and processes each item of 8-bit data in 24 channels in the PCM format, puts in cells the PCM-formatted data in 24 channels, and sends the cells sequentially to a broadband network transmission line through the remote switching unit. On receiving the above described data in cells, an adaptor provided between the broadband network and an existing telephone network converts the data to the PCM transmission format, and sends them to the existing telephone network after adding a signaling bit to them.
    Type: Grant
    Filed: February 6, 1995
    Date of Patent: May 28, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Kakuma, Shuji Yoshimura, Naoyuki Izawa
  • Patent number: 5504742
    Abstract: A broadband ISDN remote multiplexer, which is constructed by separating a subscriber line interfacing section from an ATM exchange and installing the same at a remote location connected via a high-speed transmission line, comprises: a first interface unit for carrying out conversion between a transmitted signal of UNI format, carrying a destination number in its GFC field and transmitted over a transmission medium interconnecting the ATM exchange and the broadband ISDN remote multiplexer, and a first path-control signal that directs a connection within the remote multiplexer in accordance with the destination number; a plurality of subscriber line interface units for terminating respectively the plurality of broadband ISDN subscriber lines; and a multiplexing/demultiplexing unit for making a connection between the first interface unit and each of the subscriber line interface units in accordance with the first path-control signal.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: April 2, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Kakuma, Shuji Yoshimura, Shiro Uriu, Naoki Fukuda
  • Patent number: 5488606
    Abstract: An ATM (asynchronous transfer mode) exchange has a buffer for system #0 and a buffer for system #1 providing P-MEM's for storing data including an A bit and for a VCI/VPI currently in use is set to "1'. Upon detecting a switchover between the systems, every B bit is reset to "0". When the exchange while changing from a master to a slave receives a cell having a slave indication and while changing from a slave to a master it receives a cell having a master indication, respective systems rewrite B bits for VCI/VPI's of respective cells to "1". In the meantime, each of the P-MEM's calculates exclusive "OR" operations between the A bit and the B bit for every VCI/VPI, and further obtains a disjunction among all the exclusive "OR" operations thus obtained. Then, when both P-MEM's obtain "0" for their respective disjunctions, cells are read out from one of the buffers in the system changing from a slave to a master.
    Type: Grant
    Filed: March 21, 1994
    Date of Patent: January 30, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Kakuma, Shuji Yoshimura, Kazuo Hajikano, Masami Murayama, Yuzo Okuyama
  • Patent number: 5487063
    Abstract: A cell having an attribute of a point-to-multipoint connection is distributed to each of a number of subscribers using a point-to-multipoint connection distributing switch to be provided in parallel with a point-to-point connection, concentrating and distributing switch. Therefore, a hardware configuration can be simply established. Besides, both a point-to-point connection, and a point-to-multipoint connection can be made only by switching a cell to each switching unit, and a software configuration can thus be simplified.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: January 23, 1996
    Assignee: Fujitsu Limited
    Inventors: Satoshi Kakuma, Shiro Uriu, Shuji Yoshimura, Yasuhiro Aso, Masami Murayama
  • Patent number: 5459743
    Abstract: In an address decision system in an ATM exchange, a table memory stores data showing relationships between VPI/VCI values and addresses. A latch circuit latches a VPI/VCI value contained in a cell transferred via a cell highway. A comparator circuit compares the VPI/VCI values stored in the table memory with the VPI/VCI value latched by the latch and generates a comparator output signal showing, in a normal operation, one of the addresses at which the VPI/VCI value from the latch circuit coincides with one of the VPI/VCI values in the table memory. An address decision unit encodes the comparator output signal and generates an encoded signal based on the comparator output signal. A decoder unit decodes the encoded signal and generates a decoded signal. A check unit receives the comparator output signal and the encoded signal and generates an error signal when the comparator output signal and the encoded signal do not match each other.
    Type: Grant
    Filed: July 15, 1994
    Date of Patent: October 17, 1995
    Assignee: Fujitsu Limited
    Inventors: Naoki Fukuda, Shuji Yoshimura, Satoshi Kakuma
  • Patent number: 5448720
    Abstract: An information processing system includes a simplex system and a duplex system in which at least two data transmitting systems are provided each capable of being an act system or a standby system. Each data transmitting system has a data acquiring unit. The simplex system includes a controller for controlling a selector to switch between the systems. When in a standby condition, the data acquiring unit of the respective data transmitting system in the duplex system issues an access request signal to a switching signal generating unit provided in the controller of the simplex system to request that the output of the selector be switched from the act system to the standby system in the duplex system. Upon receipt of the access request signal from the data acquiring unit in the standby system, the switching signal generating unit switches the selector to the standby system.
    Type: Grant
    Filed: September 4, 1992
    Date of Patent: September 5, 1995
    Assignee: Fujitsu Limited
    Inventors: Shiro Uriu, Shuji Yoshimura, Yoshihiro Uchida
  • Patent number: 5408461
    Abstract: An ATM transmission system transmits cell-formatted data in an asynchronous transfer mode, and aims at conducting an online path route test in the system. If one path route only is established in the system, then one or more valid cell detecting units for detecting, upon receipt of a cell enable signal indicating that a valid cell to pass through the path route has been sent, the arrival of a valid cell are provided at an optional point including an ATM switch in the path route so that the path route can be partially or entirely validity-checked. If plurality of valid path routes are established, the system provides, in addition to the valid cell detecting units, a virtual path identifier and virtual channel identifier comparing unit for comparing values of the VPI and VCI stored therein with values of a VPI and a VCI added to an arriving cell, and a path route validity check unit for partially or entirely validity-checking a path route in the ATM transmission system.
    Type: Grant
    Filed: March 21, 1994
    Date of Patent: April 18, 1995
    Assignee: Fujitsu Limited
    Inventors: Shiro Uriu, Satoshi Kakuma, Shuji Yoshimura
  • Patent number: 5394396
    Abstract: A supervision control system for an ATM cell switching system counts the number of cells transmitted from a subscriber in a predetermined duration unit, attaches a sign to the cells when the counted value exceeds a predetermined value, and discards the cells to which the sign is attached when a buffer does not have enough capacity during a cell multiplexation.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: February 28, 1995
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Naoki Aihara, Yasuhiro Aso, Masami Murayama
  • Patent number: 5369649
    Abstract: An error check of a signaling data divided into divided signaling data transferred asynchronously in a unit of cells is performed in a signaling data receiving and processing unit in a digital exchange. The exchange is connected with terminal equipment arranged in a narrow band ISDN environment in a broadband ISDN system. The error check is performed by calculating an error check code for every byte of the signaling data as it is received, accumulating the result until the cyclic redundancy code, encountered in the last byte of the signaling data, is accumulated and performing matching between the accumulated result and a constant value produced based on the CRC system. The checking is performed while the signaling data is stored in a data memory in the signaling data receiving and processing unit.
    Type: Grant
    Filed: July 17, 1991
    Date of Patent: November 29, 1994
    Assignee: Fujitsu Limited
    Inventors: Masami Murayama, Satoshi Kakuma, Shuji Yoshimura
  • Patent number: RE37435
    Abstract: A supervision control system for an ATM cell switching system counts the number of cells transmitted from a subscriber in a predetermined duration unit, attaches a sign to the cells when the counted value exceeds a predetermined value, and discards the cells to which the sign is attached when a buffer does not have enough capacity during a cell multiplexation.
    Type: Grant
    Filed: February 27, 1997
    Date of Patent: November 6, 2001
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshimura, Satoshi Kakuma, Naoki Aihara, Yasuhiro Aso, Masami Murayama