Patents by Inventor Shun Wu

Shun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8606559
    Abstract: A method for automatically detecting errors in machine translation using a parallel corpus includes analyzing morphemes of a target language sentence in the parallel corpus and a machine-translated target language sentence, corresponding to a source language sentence, to classify the morphemes into words; aligning by words and decoding, respectively, a group of the source language sentence and the machine-translated target language sentence, and a group of the source language sentence and the target language sentence in the parallel corpus; classifying by types errors in the machine-translated target language sentence by making a comparison, word by word, between the decoded target language sentence in the parallel corpus and the decoded machine-translated target language sentence; and computing error information in the machine-translated target language sentence by examining a frequency of occurrence of the classified error types.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: December 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yun Jin, Oh Woog Kwon, Ying Shun Wu, Changhao Yin, Sung Kwon Choi, Chang Hyun Kim, Seong Il Yang, Ki Young Lee, Yoon Hyung Roh, Young Ao Seo, Eun Jin Park, Young Kii Kim, Sang Kyu Park
  • Publication number: 20130321313
    Abstract: A screen frame cropping method, a screen frame cropping apparatus, and a computer program product adapted to an electronic apparatus having a touch screen are provided. In the screen frame cropping method, a frame is displayed on the touch screen, and a first touch and a second touch preformed by a user on the touch screen are detected. When the first touch and the second touch satisfy a predetermined condition, a cropped frame of the frame is stored as an image file. The cropped frame is determined according to at least one first touch position of the first touch and at least one second touch position of the second touch.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 5, 2013
    Inventors: Hung-Yi Huang, Chia-Chia Shieh, Chih-Ling Chien, Yen-Shun Wu, Sheng-Wei Li, Chien-Chuan Chang, Yung-Chao Tseng
  • Publication number: 20130230760
    Abstract: A battery module includes a first battery bracket, a second battery bracket, and a liquid cold heat-dissipating mechanism. The first battery bracket and the second battery bracket are stacked on each other. Each of the first battery bracket and the second battery bracket includes plural hollow portions for accommodating plural battery cells. The liquid cold heat-dissipating mechanism is used for removing heat from the plural battery cells. The liquid cold heat-dissipating mechanism includes an input channel, an output channel, a first flow-channel plate, at least one first connecting member, and at least one second connecting member. After a cooling liquid is introduced into the input channel, the cooling liquid is sequentially transferred through the first end of the first flow-channel plate, the first flow channel, the second end of the first flow-channel plate and the second connecting member, and discharged from the output channel.
    Type: Application
    Filed: December 6, 2012
    Publication date: September 5, 2013
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Po-Lin Pan, Meng-Shun Wu
  • Patent number: 8494835
    Abstract: A post-editing apparatus for correcting translation errors, includes: a translation error search unit for estimating translation errors using an error-specific language model suitable for a type of error desired to be estimated from translation result obtained using a translation system, and determining an order of correction of the translation errors; and a corrected word candidate generator for sequentially generating error-corrected word candidates for respective estimated translation errors on a basis of analysis of an original text of the translation system. The post-editing apparatus further includes a corrected word selector for selecting a final corrected word from among the error-corrected word candidates by using the error-specific language model suitable for the type of error desired to be corrected, and incorporating the final corrected word in the translation result, thus correcting the translation errors.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: July 23, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young Ae Seo, Chang Hyun Kim, Seong Il Yang, Changhao Yin, Yun Jin, Jinxia Huang, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Yoon Hyung Roh, Eun Jin Park, Ying Shun Wu, Young Kil Kim, Sang Kyu Park
  • Patent number: 8457947
    Abstract: A hybrid translation apparatus includes a source language input unit for generalizing an input source language sentence for each node; a statistics-based translation knowledge database(DB) for storing learning data generalized for each node to be acquired; a first translation result generating unit for transforming the source language sentence generalized for each node into a node expression using the statistics-based translation knowledge to generate a first translation result; and a second translation result generating unit for repeatedly performing the generation of a target word for each node on the first translation result using pattern-based knowledge to generate a second translation result as target words for the respective nodes.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: June 4, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Il Yang, Young Kil Kim, Chang Hyun Kim, Oh Woog Kwon, Yun Jin, Eun Jin Park, Young Ae Seo, Sung Kwon Choi, Jinxia Huang, Yoon Hyung Roh, Ying Shun Wu, Ki Young Lee, Sang Kyu Park
  • Patent number: 8415254
    Abstract: A method is provided for fabricating a semiconductor device. The method includes removing a silicon material from a gate structure located on a substrate through a cycle including: etching the silicon material to remove a portion thereof, where the substrate is spun at a spin rate, applying a cleaning agent to the substrate, and drying the substrate; and repeating the cycle, where a subsequent cycle includes a subsequent spin rate for spinning the substrate during the etching and where the subsequent spin rate does not exceed the spin rate of the previous cycle.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: April 9, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matt Yeh, Fan-Yi Hsu, Shun Wu Lin, Shu-Yuan Ku, Hui Ouyang
  • Patent number: 8401839
    Abstract: The present invention provides a Korean-English hybrid automatic translation method for providing translation from Korean to English, includes: performing a morpheme analysis and a syntactic analysis on a Korean input source text; segmenting the Korean input source text into at least two source text segments, based on the results of the morpheme analysis and the syntactic analysis; and generating a PBMT (pattern-based machine translation) translated text segment and a SMT (statistical machine translation) translated text segment with respect to each of the source text segments. Further, the method includes determining, as final translation result, one of the PBMT translated text segment and the SMT translated text segment with respect to each source text segment, based on predetermined weight information; and composing the translated text segments with respect to the source text segments of the Korean input source text into one English translated text by using the determined final translation results.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: March 19, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chang Hyun Kim, Young Ae Seo, Young-Sook Hwang, Young Kil Kim, Sung Kwon Choi, Oh Woog Kwon, Ki Young Lee, Seong Il Yang, Yun Jin, Yoon Hyung Roh, Changhao Yin, Eun Jin Park, Ying Shun Wu, Sang Kyu Park
  • Publication number: 20130042903
    Abstract: An auto-tracking sun solar energy power generator. The power generator includes an eight-diagram-shaped photovoltaic power generator of 8.8 multiples, an eight-diagram-shaped thermal energy generator of 30-50 multiples, a Striling external-combustion photothermal power generator of an eight-diagram-shaped thermal energy generator and a wind-light mutual complementing power generator with the power more than 20 kW. The first three devices are eight-diagram-shaped and of multiple sun structure. The fourth device is a wind-light mutual complementing planar silicon batteries power generator. The first three devices comprise a named multiple suns machine and a named tracking sun machine. The multiple suns machine comprises a metal bracket and planar glass. The tracking sun machine comprises a mechanical drive assembly for tracking sun and a counter-weight.
    Type: Application
    Filed: December 1, 2010
    Publication date: February 21, 2013
    Inventor: Shun Wu Henry Ng
  • Patent number: 8357617
    Abstract: Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.
    Type: Grant
    Filed: February 16, 2009
    Date of Patent: January 22, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matt Yeh, Shun Wu Lin, Chi-Chun Chen, Ryan Chia-Jen Chen, Yi-Hsing Chen, Chien-Hao Chen, Donald Y. Chao, Kuo-Bin Huang
  • Patent number: 8335681
    Abstract: A machine-translation apparatus using multi-level verbal-phrase patterns includes: a simple sentence generation unit for generating an input simple sentence; a basic verbal-phrase pattern-matching unit for trying a match of a semantic code of each case component of the input simple sentence with basic verbal-phrase patterns; a default verbal-phrase pattern matching unit for trying a match of a size and case prepositions of the input simple sentence with default verbal-phrase patterns having a verb identical to that of the input simple sentence; a default word-order matching unit for trying a match of a word-order of the input simple sentence with default word-order verbal-phrase patterns having a case component structure identical to that of the input simple sentence; and a default preposition matching unit for generating a target sentence of an input sentence with default preposition patterns having a context identical to that of the input simple sentence.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: December 18, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Changhao Yin, Chang Hyun Kim, Young Ae Seo, Seong Il Yang, Eun Jin Park, Yun Jin, Sung Kwon Choi, Ki Young Lee, Oh Woog Kwon, Yoon Hyung Roh, Ying Shun Wu, Young Kil Kim, Sang Kyu Park
  • Publication number: 20120270254
    Abstract: A method for analyzing secretome, a biomarker for lung cancer metastasis, and a siRNA compound for inhibiting lung cancer metastasis are disclosed. The method for analyzing secretome of the present invention comprises the following steps: (A) collecting proteome secreted from a cell; (B) providing a purification gel, wherein the purification gel comprises a low-density layer, and a high-density layer, and the low-density layer is stacked on the high-density layer; (C) adding the proteome on the low-density layer, and separating the proteome through the low-density layer and the high-density layer of the purification gel; (D) collecting the separated proteome on the interface between the low-density layer and high-density layer, and tagging the separated proteome with a reagent after digestion; and (E) analyzing the separated proteome tagged with the reagent, and comparing an analysis result with a proteomic database.
    Type: Application
    Filed: December 27, 2011
    Publication date: October 25, 2012
    Applicant: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Pao-Chi LIAO, Ying-Hwa CHANG, Kuo-Hsun CHIU, Yu-Shun WU, Shu-Hui LEE
  • Patent number: 8279020
    Abstract: The invention discloses the variable attenuator with characteristics, comprising wide attenuation ranges; syntheses on group delays, and low variation of the group delay. The building blocks, which construct the variable attenuator, comprise internal matching networks, external matching networks, delay networks, protecting networks, biasing network, a power combining network, and variable impedance networks. The elements, which realize the internal matching networks, external matching networks, signal combining networks, comprise resistor, inductor, capacitor, and transmission lines. The elements, which realize the variable impedance networks, comprise n-channel field-effect transistor (FET), p-channel FET, n-type bipolar junction transistor (BJT), and p-type BJT. The elements of the variable attenuator can be either integrated on a semiconductor chip by using system-on-chip (SOC) technologies.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: October 2, 2012
    Assignee: National Taiwan University
    Inventors: Ching-Kuang Tzuang, Chao-Wei Wang, Shian-Shun Wu
  • Patent number: 8268085
    Abstract: A method for cleaning a diffusion barrier over a gate dielectric of a metal-gate transistor over a substrate is provided. The method includes cleaning the diffusion barrier with a first solution including at least one surfactant. The amount of the surfactant of the first solution is about a critical micelle concentration (CMC) or more. The diffusion barrier is cleaned with a second solution. The second solution has a physical force to remove particles over the diffusion barrier. The second solution is substantially free from interacting with the diffusion barrier.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: September 18, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matt Yeh, Shun Wu Lin, Hui Ouyang
  • Patent number: 8265922
    Abstract: A translation-memory application method for automatic translation includes: generating TM-expanded forms by applying TM expansion rules respectively to source sentences whose morphemes have been analyzed; storing in an expanded TM database translated sentences corresponding to the generated TM-expanded source sentences; analyzing morphemes if an input sentence does not match any of the source sentences stored in basic TM database; generating a TM-expanded form by applying pertinent ones among the TM expansion rules to the input sentence whose morphemes have been analyzed; and producing, if the TM-expanded input sentence matches one of the TM-expanded source sentences stored in the expanded TM database, a translated output corresponding to the matched TM-expanded source sentence.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: September 11, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chang Hyun Kim, Oh Woog Kwon, Yoon Hyung Roh, Young Ae Seo, Seong Il Yang, Ki Young Lee, Sung Kwon Choi, Yun Jin, Eun Jin Park, Ying Shun Wu, Changhao Yin, Jinxia Huang, Young Kil Kim, Sang Kyu Park
  • Publication number: 20120177972
    Abstract: A battery module includes a housing, a plurality of thermally conductive plates, a plurality of flat cells and a fixing unit. The thermally conductive plates and the flat cells are received in the housing. At least one of the thermally conductive plates is received between two of the flat cells and contacts with at least one of the two of the flat cells. Each of the flat cells respectively has a cell body and at least an electrode connected to and extended from the cell body. The fixing unit is received in the housing, and the electrode is fixed on the fixing unit. The battery module is applied advantageously to integrate the thermal dissipation system with the fixing structure. Additionally, the particular configuration used herein is beneficial to reduce the risk of electrode breakage.
    Type: Application
    Filed: January 11, 2012
    Publication date: July 12, 2012
    Inventors: Jian-Jang Lai, Ku-Yueh Chen, Meng-Shun Wu
  • Patent number: 8183961
    Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M?1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M?1 metal frame(s), the M?1 metal frame(s) interlaminated M?2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: May 22, 2012
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20120118836
    Abstract: A retaining bracket structure includes a main body and an insertion member. The main body includes a hang portion and a display portion. The display portion includes a plurality of engaging portions. Each engaging portion has a positioning hole therein and a plurality of positioning protrusions on an outer side thereof. The inserting portion includes a plurality of anti-theft engaging rods and fixing rods. Each anti-theft engaging rod is fixed to the positioning hole. Each fixing rod is against a top surface of a corresponding engaging portion of the main body. The positioning protrusions are engaged with an inner wall of a sleeve fitted on the engaging portion of the display portion of the main body, such that the sleeve is firmly positioned on the main body. The anti-theft engaging rod can prevent the sleeve from disengagement and theft, providing a steady connection and a better positioning effect.
    Type: Application
    Filed: November 11, 2010
    Publication date: May 17, 2012
    Inventor: Lai-Shun WU
  • Patent number: 8173504
    Abstract: A method for fabricating an integrated device is disclosed. A polysilicon gate electrode layer is provided on a substrate. In an embodiment, a treatment is provided on the polysilicon gate electrode layer to introduce species in the gate electrode layer and form an electrically neutralized portion therein. Then, a hard mask layer with limited thickness is applied on the treated polysilicon gate electrode layer. A tilt angle ion implantation is thus performing on the substrate after patterning the hard mask layer and the treated polysilicon gate electrode to from a gate structure.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: May 8, 2012
    Inventors: Matt Yeh, Fan-Yi Hsu, Shun Wu Lin, Hui Ouyang, Chi-Ming Yang
  • Publication number: 20120107520
    Abstract: Residues are removed from a surface of a substrate processing component which has a polymer coating below the residues. In one version, the component surfaces are contacted with an organic solvent to remove the residues without damaging or removing the polymer coating. The residues can be process residues or adhesive residues. The cleaning process can be conducted as part of a refurbishment process. In another version, the residues are ablated by scanning a laser across the component surface. In yet another version, the residues are vaporized by scanning a plasma cutter across the surface of the component.
    Type: Application
    Filed: January 6, 2012
    Publication date: May 3, 2012
    Inventors: Brian T. West, Karl Brueckner, Shun Wu, Robert Haney
  • Patent number: 8114721
    Abstract: A method of forming a FinFET device is provided. In one embodiment, a fin is formed on a substrate. A gate structure is formed over the fin, the gate structure having a dielectric layer and a conformal first polysilicon layer formed above the dielectric layer. An etch stop layer is formed above the first polysilicon layer and thereafter a second polysilicon layer is formed above the etch stop layer. The second polysilicon layer and the etch stop layer are removed. A metal layer is formed above the first polysilicon layer. The first polysilicon layer is reacted with the metal layer to silicide the first polysilicon layer. Any un-reacted metal layer is thereafter removed and source and drain regions are formed on opposite sides of the fin.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: February 14, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shun Wu Lin, Peng-Soon Lim, Matt Yeh, Ouyang Hui