Patents by Inventor Shunsuke Adachi

Shunsuke Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294034
    Abstract: In a light detection device, switches are connected in parallel to each other. Each of the switches is connected to an APD. A read line electrically connects the switch and a signal processor to each other. The switch is configured such that a second terminal is connected to the read line and a voltage greater than or equal to a breakdown voltage is applied to the APD in a conductive state. The switch is configured such that the second terminal is not connected to the read line and a voltage greater than or equal to a breakdown voltage is applied to the APD in the conductive state. The switch is configured such that the second terminal is not connected to the read line and a voltage less than a breakdown voltage is applied to the APD in the conductive state.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: May 6, 2025
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya Iwashina, Terumasa Nagano, Masanori Okada, Shunsuke Adachi, Takuya Fujita
  • Patent number: 12281938
    Abstract: In a light detection device, each pixel includes a plurality of APDs. Each APD forms a light receiving region and is configured to operate in a Geiger mode. The plurality of APDs forms a plurality of light receiving regions arranged in a direction along a main surface in a pixel area ? occupied by a corresponding pixel among a plurality of pixels. The MOS switch circuit region overlaps with the plurality of light receiving regions when viewed from a Z-axis direction. When viewed from the Z-axis direction, the area of the MOS switch circuit region is greater than the area of one light receiving region formed in the pixel area, and less than or equal to the area of the pixel area. A plurality of APDs included in each pixel is electrically connected in parallel to each other and each is connected to a MOS switch circuit.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: April 22, 2025
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya Iwashina, Terumasa Nagano, Masanori Okada, Shunsuke Adachi, Takuya Fujita
  • Publication number: 20250116551
    Abstract: In a signal processing circuit, an input terminal is configured to receive an analog signal output from an avalanche photodiode operating in Geiger mode. A comparison circuit outputs a signal based on a component exceeding a threshold among components a signal input to the comparison circuit. The adjustment circuit includes an AC coupling unit, a level shifter unit, and a reference value adjustment unit. The AC coupling unit establishes AC coupling between the input terminal and the comparison circuit. The level shifter unit adjusts the voltage of the signal input to the comparison circuit to a value lower than a reverse bias voltage applied to the avalanche photodiode. The reference value adjustment unit adjusts the reference value of the signal input to the comparison circuit.
    Type: Application
    Filed: January 27, 2023
    Publication date: April 10, 2025
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Riku SHIMADA, Takuya FUJITA, Takashi BABA, Shunsuke ADACHI, Shinya IWASHINA
  • Publication number: 20240393172
    Abstract: In a light detection device, each pixel includes a plurality of APDs. Each APD forms a light receiving region and is configured to operate in a Geiger mode. The plurality of APDs forms a plurality of light receiving regions arranged in a direction along a main surface in a pixel area ? occupied by a corresponding pixel among a plurality of pixels. The MOS switch circuit region overlaps with the plurality of light receiving regions when viewed from a Z-axis direction. When viewed from the Z-axis direction, the area of the MOS switch circuit region is greater than the area of one light receiving region formed in the pixel area, and less than or equal to the area of the pixel area. A plurality of APDs included in each pixel is electrically connected in parallel to each other and each is connected to a MOS switch circuit.
    Type: Application
    Filed: September 7, 2022
    Publication date: November 28, 2024
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya IWASHINA, Terumasa NAGANO, Masanori OKADA, Shunsuke ADACHI, Takuya FUJITA
  • Publication number: 20240387754
    Abstract: In a light detection device, switches are connected in parallel to each other. Each of the switches is connected to an APD. A read line electrically connects the switch and a signal processor to each other. The switch is configured such that a second terminal is connected to the read line and a voltage greater than or equal to a breakdown voltage is applied to the APD in a conductive state. The switch is configured such that the second terminal is not connected to the read line and a voltage greater than or equal to a breakdown voltage is applied to the APD in the conductive state. The switch is configured such that the second terminal is not connected to the read line and a voltage less than a breakdown voltage is applied to the APD in the conductive state.
    Type: Application
    Filed: August 10, 2022
    Publication date: November 21, 2024
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya IWASHINA, Terumasa NAGANO, Masanori OKADA, Shunsuke ADACHI, Takuya FUJITA
  • Publication number: 20240304644
    Abstract: Each of a plurality of cells includes at least one avalanche photodiode. A light projecting unit is arranged to project light having a cross-sectional shape whose longitudinal direction corresponds to a first direction. The light projecting unit is arranged to scan the light along a second direction intersecting the first direction such that the reflected light is incident on, among N cell groups each of which includes M cells aligned in a row direction, each cell group or each plurality of cell groups. A controller is arranged to apply, in accordance with the incidence of the reflected light, a bias voltage that makes the avalanche photodiode operate in a Geiger mode to each cell group or each plurality of cell groups, and is arranged to read signals from cells included in the cell group or the plurality of cell groups to which the bias voltage has been applied.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 12, 2024
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya IWASHINA, Shunsuke Adachi, Shigeyuki Nakamura, Terumasa Nagano, Ryutaro Tsuchiya
  • Patent number: 12021100
    Abstract: Each of a plurality of cells includes at least one avalanche photodiode. A light projecting unit is arranged to project light having a cross-sectional shape whose longitudinal direction corresponds to a first direction. The light projecting unit is arranged to scan the light along a second direction intersecting the first direction such that the reflected light is incident on, among N cell groups each of which includes M cells aligned in a row direction, each cell group or each plurality of cell groups. A controller is arranged to apply, in accordance with the incidence of the reflected light, a bias voltage that makes the avalanche photodiode operate in a Geiger mode to each cell group or each plurality of cell groups, and is arranged to read signals from cells included in the cell group or the plurality of cell groups to which the bias voltage has been applied.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: June 25, 2024
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya Iwashina, Shunsuke Adachi, Shigeyuki Nakamura, Terumasa Nagano, Ryutaro Tsuchiya
  • Patent number: 11322635
    Abstract: A photodetecting device includes a semiconductor substrate including a one-dimensionally distributed plurality of pixels. The photodetecting device includes, for each pixel, a plurality of avalanche photodiodes arranged to operate in Geiger mode, a plurality of quenching resistors electrically connected in series with the respective avalanche photodiodes, and a signal processing unit arranged to process output signals from the plurality of avalanche photodiodes. Light receiving regions of the plurality of avalanche photodiodes are two-dimensionally distributed for each pixel. Each signal processing unit includes a gate grounded circuit and a current mirror circuit electrically connected to the gate grounded circuit. The gate grounded circuit is electrically connected to the plurality of avalanche photodiodes of the corresponding pixel via the plurality of quenching resistors. The current minor circuit is arranged to output a signal corresponding to output signals from the plurality of avalanche photodiodes.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: May 3, 2022
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Takashi Baba, Shunsuke Adachi, Shigeyuki Nakamura, Terumasa Nagano, Koei Yamamoto
  • Patent number: 11183608
    Abstract: A photodetecting device includes a semiconductor photodetecting element including a plurality of pixels distributed two-dimensionally and a mount substrate including a plurality of signal processing units arranged to process output signals from the corresponding pixels. The semiconductor photodetecting element includes, for each of the pixels, a plurality of avalanche photodiodes arranged to operate in Geiger mode, a plurality of quenching resistors each electrically connected in series with a respective avalanche photodiodes, and a through-electrode electrically connected to the plurality of quenching resistors. Each of the signal processing units includes a current mirror circuit electrically connected to the plurality of avalanche photodiodes via the corresponding through-electrode and arranged to output a signal corresponding to output signals from the plurality of avalanche photodiodes.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: November 23, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shigeyuki Nakamura, Shunsuke Adachi, Takashi Baba, Terumasa Nagano, Koei Yamamoto
  • Publication number: 20210344864
    Abstract: Each of a plurality of cells includes at least one avalanche photodiode. A light projecting unit is arranged to project light having a cross-sectional shape whose longitudinal direction corresponds to a first direction. The light projecting unit is arranged to scan the light along a second direction intersecting the first direction such that the reflected light is incident on, among N cell groups each of which includes M cells aligned in a row direction, each cell group or each plurality of cell groups. A controller is arranged to apply, in accordance with the incidence of the reflected light, a bias voltage that makes the avalanche photodiode operate in a Geiger mode to each cell group or each plurality of cell groups, and is arranged to read signals from cells included in the cell group or the plurality of cell groups to which the bias voltage has been applied.
    Type: Application
    Filed: June 6, 2019
    Publication date: November 4, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shinya IWASHINA, Shunsuke ADACHI, Shigeyuki NAKAMURA, Terumasa NAGANO, Ryutaro TSUCHIYA
  • Publication number: 20200058821
    Abstract: A photodetecting device includes a semiconductor substrate including a one-dimensionally distributed plurality of pixels. The photodetecting device includes, for each pixel, a plurality of avalanche photodiodes arranged to operate in Geiger mode, a plurality of quenching resistors electrically connected in series with the respective avalanche photodiodes, and a signal processing unit arranged to process output signals from the plurality of avalanche photodiodes. Light receiving regions of the plurality of avalanche photodiodes are two-dimensionally distributed for each pixel. Each signal processing unit includes a gate grounded circuit and a current mirror circuit electrically connected to the gate grounded circuit. The gate grounded circuit is electrically connected to the plurality of avalanche photodiodes of the corresponding pixel via the plurality of quenching resistors. The current minor circuit is arranged to output a signal corresponding to output signals from the plurality of avalanche photodiodes.
    Type: Application
    Filed: November 9, 2017
    Publication date: February 20, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Takashi BABA, Shunsuke ADACHI, Shigeyuki NAKAMURA, Terumasa NAGANO, Koei YAMAMOTO
  • Publication number: 20190334050
    Abstract: A photodetecting device includes a semiconductor photodetecting element including a plurality of pixels distributed two-dimensionally and a mount substrate including a plurality of signal processing units arranged to process output signals from the corresponding pixels. The semiconductor photodetecting element includes, for each of the pixels, a plurality of avalanche photodiodes arranged to operate in Geiger mode, a plurality of quenching resistors each electrically connected in series with a respective avalanche photodiodes, and a through-electrode electrically connected to the plurality of quenching resistors. Each of the signal processing units includes a current mirror circuit electrically connected to the plurality of avalanche photodiodes via the corresponding through-electrode and arranged to output a signal corresponding to output signals from the plurality of avalanche photodiodes.
    Type: Application
    Filed: November 9, 2017
    Publication date: October 31, 2019
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Shigeyuki NAKAMURA, Shunsuke ADACHI, Takashi BABA, Terumasa NAGANO, Koei YAMAMOTO
  • Patent number: 10355136
    Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film. The spin density of the gate insulating film or the protective film measured by electron spin resonance spectroscopy is lower than 1×1018 spins/cm3, preferably higher than or equal to 1×1017 spins/cm3 and lower than 1×1018 spins/cm3.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: July 16, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Motoki Nakashima, Masahiro Takahashi, Shunsuke Adachi, Takuya Hirohashi
  • Patent number: 10121903
    Abstract: A semiconductor device including a transistor having a reduced number of oxygen vacancies in a channel formation region of an oxide semiconductor with stable electrical characteristics or high reliability is provided. A gate insulating film is formed over a gate electrode; an oxide semiconductor layer is formed over the gate insulating film; an oxide layer is formed over the oxide semiconductor layer by a sputtering method to form an stacked-layer oxide film including the oxide semiconductor layer and the oxide layer; the stacked-layer oxide film is processed into a predetermined shape; a conductive film containing Ti as a main component is formed over the stacked-layer oxide film; the conductive film is etched to form source and drain electrodes and a depression portion on a back channel side; and portions of the stacked-layer oxide film in contact with the source and drain electrodes are changed to an n-type by heat treatment.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: November 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasutaka Nakazawa, Masami Jintyou, Junichi Koezuka, Kenichi Okazaki, Takuya Hirohashi, Shunsuke Adachi
  • Publication number: 20180308995
    Abstract: A photoelectric conversion element comprises: a first electrode layer 12; a compound-based photoelectric conversion layer 13 disposed on the first electrode layer 12; a buffer layer 15 disposed on the compound-based photoelectric conversion layer 13 comprising a mixed crystal of ZnO and ZnS, wherein a ratio of the number of S atoms to the number of Zn atoms is in a range of 0.290 to 0.493; and a second electrode layer 16 disposed on the buffer layer 15.
    Type: Application
    Filed: September 28, 2016
    Publication date: October 25, 2018
    Applicant: Solar Frontier K.K.
    Inventors: Shunsuke ADACHI, Rui KAMADA, Homare HIROI
  • Patent number: 10026966
    Abstract: A lithium secondary battery which has high charge-discharge capacity, can be charged and discharged at high speed, and has little deterioration in battery characteristics due to charge and discharge is provided. A negative electrode includes a current collector and a negative electrode active material layer. The current collector includes a plurality of protrusion portions extending in a substantially perpendicular direction and a base portion connected to the plurality of protrusion portions. The protrusion portions and the base portion are formed using the same material containing titanium. A top surface of the base portion and at least a side surface of the protrusion portion are covered with the negative electrode active material layer. The negative electrode active material layer may be covered with graphene.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: July 17, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Ryota Tajima, Teppei Oguni, Takeshi Osada, Shunpei Yamazaki, Shunsuke Adachi, Takuya Hirohashi
  • Publication number: 20180175210
    Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film. The spin density of the gate insulating film or the protective film measured by electron spin resonance spectroscopy is lower than 1×1018 spins/cm3, preferably higher than or equal to 1×1017 spins/cm3 and lower than 1×1018 spins/cm3.
    Type: Application
    Filed: February 14, 2018
    Publication date: June 21, 2018
    Inventors: Akiharu MIYANAGA, Yasuharu HOSAKA, Toshimitsu OBONAI, Junichi KOEZUKA, Motoki NAKASHIMA, Masahiro TAKAHASHI, Shunsuke ADACHI, Takuya HIROHASHI
  • Patent number: 9989657
    Abstract: A readout circuit for reading out an output current from a photoelectric conversion element which collectively outputs currents generated in a plurality of pixels, each of which includes an avalanche photodiode, includes a current mirror circuit configured to receive the output current and output first and second currents having magnitudes in proportion to the output current, a photon counting circuit configured to count the number of photons incident on the photoelectric conversion element on the basis of the first current, an integral circuit configured to integrate the second current to generate a voltage signal, and a signal processing unit configured to determine a magnitude of light incident on the photoelectric conversion element on the basis of a counting result output from the photon counting circuit and a magnitude of the voltage signal output from the integral circuit.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: June 5, 2018
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Shigeyuki Nakamura, Tsuyoshi Ohta, Michito Hirayanagi, Hiroki Suzuki, Shunsuke Adachi
  • Patent number: 9939535
    Abstract: A Compton camera includes a scattering detection unit, an absorption detection unit, a signal processing unit, a first shield unit, and a second shield unit. The scattering detection unit detects Compton scattering of incident radiation emitted from a radiation source. The absorption detection unit detects absorption of incident radiation that has undergone Compton scattering at the scattering detection unit. The signal processing unit obtains an image of the radiation source based on coincident detection events of Compton scattering of radiation at the scattering detection unit and absorption of radiation at the absorption detection unit. The first and second shield units are provided between the scattering detection unit and the absorption detection unit. The first shield unit selectively allows forward-scattered radiation to pass and selectively blocks back-scattered radiation.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: April 10, 2018
    Assignees: WASEDA UNIVERSITY, HAMAMATSU PHOTONICS K.K.
    Inventors: Jun Kataoka, Toru Nishiyama, Shinji Ohsuka, Michito Hirayanagi, Shunsuke Adachi, Tetsuya Uchiyama
  • Patent number: 9911853
    Abstract: In a semiconductor device using a transistor including an oxide semiconductor, a change in electrical characteristics is suppressed and reliability is improved. The semiconductor device includes a gate electrode over an insulating surface; an oxide semiconductor film overlapping with the gate electrode; a gate insulating film that is between the gate electrode and the oxide semiconductor film and in contact with the oxide semiconductor film; a protective film in contact with a surface of the oxide semiconductor film that is an opposite side of a surface in contact with the gate insulating film; and a pair of electrodes in contact with the oxide semiconductor film. The spin density of the gate insulating film or the protective film measured by electron spin resonance spectroscopy is lower than 1×1018 spins/cm3, preferably higher than or equal to 1×1017 spins/cm3 and lower than 1×1018 spins/cm3.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: March 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Yasuharu Hosaka, Toshimitsu Obonai, Junichi Koezuka, Motoki Nakashima, Masahiro Takahashi, Shunsuke Adachi, Takuya Hirohashi