Patents by Inventor Shunsuke Katoh

Shunsuke Katoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763359
    Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: September 1, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shunsuke Katoh, Yusuke Kawaguchi
  • Patent number: 10654477
    Abstract: Provided is a feature such that the opportunity to cancel travel control can be reduced by seamlessly switching between travel modes in combination with a plurality of functions. A travel control device has: a first mode which causes a vehicle to travel according to the control target set on the basis of an object outside the vehicle; and a second mode which causes the vehicle to travel according to the control target set irrespective of an object outside the vehicle. If it is impossible to set the control target on the basis of the object outside the vehicle during traveling in the first mode, the travel mode is shifted to the second mode. If it is possible to set the control target on the basis of the object outside the vehicle during traveling in the second mode, the travel mode is shifted to the first mode.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: May 19, 2020
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Shunsuke Katoh, Kiyoshi Yorozuya, Shigenori Hayase
  • Patent number: 10538800
    Abstract: A TFT biosensor includes a gate electrode (silicon substrate), a reference electrode, and enzyme that is fixed to an insulating substrate spatially separated from the gate electrode and the reference electrode. A pH variation in the vicinity of an ion-sensitive insulating film is induced by a reaction between the enzyme and a sensing object material. The TFT biosensor can detect a concentration of the sensing object material with high sensitivity by detecting the pH variation as a threshold voltage shift of characteristics of a gate-source voltage to a source-drain current.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: January 21, 2020
    Assignee: TIANMA MICROELECTRONICS CO., LTD.
    Inventors: Kazushige Takechi, Shinnosuke Iwamatsu, Yutaka Abe, Toru Yahagi, Shunsuke Konno, Mutsuto Katoh
  • Publication number: 20190330674
    Abstract: A TFT biosensor includes a gate electrode (silicon substrate), a reference electrode, and enzyme that is fixed to an insulating substrate spatially separated from the gate electrode and the reference electrode. A pH variation in the vicinity of an ion-sensitive insulating film is induced by a reaction between the enzyme and a sensing object material. The TFT biosensor can detect a concentration of the sensing object material with high sensitivity by detecting the pH variation as a threshold voltage shift of characteristics of a gate-source voltage to a source-drain current.
    Type: Application
    Filed: July 9, 2019
    Publication date: October 31, 2019
    Applicant: Tianma Japan, Ltd.
    Inventors: Kazushige TAKECHI, Shinnosuke IWAMATSU, Yutaka ABE, Toru YAHAGI, Shunsuke KONNO, Mutsuto KATOH
  • Patent number: 10385377
    Abstract: A TFT biosensor includes a gate electrode (silicon substrate), a reference electrode, and enzyme that is fixed to an insulating substrate spatially separated from the gate electrode and the reference electrode. A pH variation in the vicinity of an ion-sensitive insulating film is induced by a reaction between the enzyme and a sensing object material. The TFT biosensor can detect a concentration of the sensing object material with high sensitivity by detecting the pH variation as a threshold voltage shift of characteristics of a gate-source voltage to a source-drain current.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: August 20, 2019
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventors: Kazushige Takechi, Shinnosuke Iwamatsu, Yutaka Abe, Toru Yahagi, Shunsuke Konno, Mutsuto Katoh
  • Publication number: 20190123197
    Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Inventors: Shunsuke KATOH, Yusuke KAWAGUCHI
  • Patent number: 10236377
    Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: March 19, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Katoh, Yusuke Kawaguchi
  • Publication number: 20180257648
    Abstract: Provided is a feature such that the opportunity to cancel travel control can be reduced by seamlessly switching between travel modes in combination with a plurality of functions. This travel control device 201 has: a first mode which causes a vehicle to travel according to the control target set on the basis of an object outside the vehicle; and a second mode which causes the vehicle to travel according to the control target set irrespective of an object outside the vehicle. If it is impossible to set the control target on the basis of the object outside the vehicle during traveling in the first mode, the travel mode is shifted to the second mode. If it is impossible to set the control target on the basis of the object outside the vehicle during traveling in the second mode, the travel mode is shifted to the first mode.
    Type: Application
    Filed: September 20, 2016
    Publication date: September 13, 2018
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Shunsuke KATOH, Kiyoshi YOROZUYA, Shigenori HAYASE
  • Publication number: 20180240867
    Abstract: According to an embodiment, a semiconductor device includes a semiconductor layer, a first electrode, and a first insulating film. The first electrode extends in a first direction and is provided inside the semiconductor layer. The first insulating film is provided between the semiconductor layer and the first electrode, a thickness of the first insulating film in a direction from the first electrode toward the semiconductor layer increasing in stages along the first direction. The first insulating film has three or more mutually-different thicknesses.
    Type: Application
    Filed: August 30, 2017
    Publication date: August 23, 2018
    Inventors: Shunsuke Nitta, Takeru Matsuoka, Shunsuke Katoh, Masatoshi Arai, Shinya Ozawa, Bungo Tanaka
  • Publication number: 20180102308
    Abstract: In some embodiments, a semiconductor device includes a semiconductor chip including a first terminal, a second terminal and a third terminal, a frame electrically coupled to the second terminal, the frame mounting the semiconductor chip, a first conductor including a chip connection electrically coupled to the first terminal, a first connection connecting to the chip connection and protruding from the chip connection, and a second connection connecting to the chip connection, protruding from the chip connection, and being provided physically spaced from the first connection. The semiconductor device further includes a second conductor electrically coupled to the third terminal.
    Type: Application
    Filed: March 1, 2017
    Publication date: April 12, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuya NISHIWAKI, Shunsuke KATOH, Masatoshi ARAI, Chikako YOSHIOKA, Bungo TANAKA, Shinya OZAWA, Takahiro KAWANO
  • Publication number: 20170263768
    Abstract: A semiconductor device includes a first conductivity type first semiconductor region, a second semiconductor region on the first semiconductor region, a third semiconductor region on the second semiconductor region, a first insulating portion extending inwardly of, and surrounded by, the first semiconductor region, a gate electrode extending inwardly of the first insulating portion and spaced from the second semiconductor region in a second direction that intersects a first direction extending from the first semiconductor region to the second semiconductor region, by the first insulating portion, and a first electrode including a portion spaced from the first semiconductor region in the second direction by the first insulating portion, and surrounded by the first insulating portion and the gate electrode.
    Type: Application
    Filed: August 30, 2016
    Publication date: September 14, 2017
    Inventors: Shunsuke KATOH, Yusuke KAWAGUCHI
  • Patent number: 9224823
    Abstract: A semiconductor apparatus includes a drain region of a first-conductivity type, a drain electrode electrically coupled to the drain region, and a semiconductor layer of the first-conductivity type formed onto the drain region and having a first impurity concentration. The semiconductor apparatus further includes: a source region of the first-conductivity type formed on the semiconductor layer and having a second impurity concentration; a first source electrode electrically coupled to the source region; and a gate electrode formed via an insulating layer. The one end of the gate electrode is in a depth of the source region, and the other end is in a depth of the semiconductor layer or the drain region. A second source electrode is provided in the semiconductor layer under the gate electrodes via an insulating layer. A second spacing between the second source electrodes is larger than a first spacing between the gate electrodes.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Katoh, Yusuke Kawaguchi
  • Publication number: 20150349113
    Abstract: According to one embodiment, a semiconductor device, includes a first semiconductor layer of a first conductivity, a second semiconductor layer of a second conductivity type, and a third semiconductor layer of the first conductivity. A first plurality of source elements are spaced from each other and a first gate electrode extends continuously between the source elements. A source electrode is electrically connected to the source elements, and a drain electrode is on the first semiconductor layer such that the first semiconductor layer is between the second semiconductor layer and the drain electrode. By employing this structure, an inactive region decreases, and an active area ratio increases. Thereby, a breakdown voltage can be maintained while an on-resistance can be reduced.
    Type: Application
    Filed: February 27, 2015
    Publication date: December 3, 2015
    Inventors: Shunsuke KATOH, Yusuke KAWAGUCHI, Tetsuro NOZU
  • Publication number: 20150263110
    Abstract: According to an embodiment, a semiconductor device includes a first region, a second region, a first electrode, a first semiconductor layer provided on the first electrode, a second semiconductor layer provided on the first semiconductor layer, a third semiconductor layer provided on the second semiconductor layer in the second region, second electrodes, third electrodes, a third insulator film, a fourth electrode, a fourth insulator film, and a fifth electrode. The third electrodes face the second semiconductor layer and the first semiconductor layer in the first region through a second insulator film. The third electrodes face the third semiconductor layer, the second semiconductor layer and the first semiconductor layer in the second region through the second insulator film. Some of the third electrodes extend from the first region to the second region, and the others of the third electrodes are provided separately from each other in the second region.
    Type: Application
    Filed: September 10, 2014
    Publication date: September 17, 2015
    Inventors: Yusuke Kawaguchi, Tetsuro Nozu, Shunsuke Katoh
  • Patent number: 8968017
    Abstract: According to one embodiment, a semiconductor memory device includes a first semiconductor layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer is a first conductivity type. The second semiconductor layer is provided in a surface region of the first semiconductor layer and is the first conductivity type. The first electrode is provided inside a first trench extending in the first direction and opened to a surface of the second semiconductor layer. The second electrode is provided in a second trench extending in a second direction crossing the first direction and opened to the surface of the second semiconductor layer. A dimension from the surface of the second semiconductor layer to a lower end of the second electrode is shorter than a dimension from the surface of the second semiconductor layer to a lower end of the first electrode.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Keiko Kawamura, Hitoshi Kobayashi, Yusuke Kawaguchi, Shunsuke Katoh
  • Publication number: 20140284707
    Abstract: According to one embodiment, a semiconductor memory device includes a first semiconductor layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer is a first conductivity type. The second semiconductor layer is provided in a surface region of the first semiconductor layer and is the first conductivity type. The first electrode is provided inside a first trench extending in the first direction and opened to a surface of the second semiconductor layer. The second electrode is provided in a second trench extending in a second direction crossing the first direction and opened to the surface of the second semiconductor layer. A dimension from the surface of the second semiconductor layer to a lower end of the second electrode is shorter than a dimension from the surface of the second semiconductor layer to a lower end of the first electrode.
    Type: Application
    Filed: September 11, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Keiko Kawamura, Hitoshi Kobayashi, Yusuke Kawaguchi, Shunsuke Katoh
  • Publication number: 20140284711
    Abstract: A semiconductor apparatus includes a drain region of a first-conductivity type, a drain electrode electrically coupled to the drain region, and a semiconductor layer of the first-conductivity type formed onto the drain region and having a first impurity concentration. The semiconductor apparatus further includes: a source region of the first-conductivity type formed on the semiconductor layer and having a second impurity concentration; a first source electrode electrically coupled to the source region; and a gate electrode formed via an insulating layer. The one end of the gate electrode is in a depth of the source region, and the other end is in a depth of the semiconductor layer or the drain region. A second source electrode is provided in the semiconductor layer under the gate electrodes via an insulating layer. A second spacing between the second source electrodes is larger than a first spacing between the gate electrodes.
    Type: Application
    Filed: September 10, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Katoh, Yusuke Kawaguchi
  • Publication number: 20070267672
    Abstract: A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer; a plurality of first trenches passing through the second semiconductor layer and reaching the first semiconductor layer; a gate insulating film provided on an inner wall of the first trench; and a gate electrode filling in the first trench via the gate insulating film. A PN junction interface is provided between the first semiconductor layer and the second semiconductor layer. A distance from an upper face of the second semiconductor layer to the PN junction interface is minimized nearly at a center between the first trenches.
    Type: Application
    Filed: May 4, 2007
    Publication date: November 22, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshitaka HOKOMOTO, Akio Takano, Shunsuke Katoh
  • Patent number: 4985672
    Abstract: In equipment which measures current of ICs for testing them, there are provided a first current detector for detecting current which flows through an IC under test when applying voltage from a voltage source to a power source terminal of the IC to which a smoothing capacitor is connected, a buffer amplifier for extracting the voltage to be applied to the power source terminal, a compensating capacitor which is supplied with the output of the buffer amplifier and provides a charging/discharging current equivalent to that which flows through the smoothing capacitor, a second current detector for detecting the charging/discharging current of the compensating capacitor, and a subtractor for subtracting the output of the second current detector from the output of the first current detector.
    Type: Grant
    Filed: December 11, 1989
    Date of Patent: January 15, 1991
    Assignee: Advantest Corporation
    Inventors: Yoshihiro Hashimoto, Shoji Yamazaki, Shunsuke Katoh