Patents by Inventor Shuzo Kagawa

Shuzo Kagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5969290
    Abstract: The invention provides a thermoelectric element produced by placing a powder of thermoelectric material over an electrode plate first and then an electrode plate over the power to form superposed layers, and thereafter sintering the powder with a pressure applied thereto perpendicular to the superposed layers. The electrode plates and the thermoelectric material are joined into an integral assembly before fabricating a thermoelectric module. The invention provides a thermoelectric module which is produced by arranging p-type thermoelectric elements and n-type thermoelectric elements alternately in a row at a predetermined interval, each of the elements comprising a thermoelectric material provided between and joined to a pair of opposed electrode plates, and interconnecting pairs of spaced adjacent upper electrode plates and pairs of spaced adjacent lower electrode plates alternately by brazing to electrically connect the p-type and n-type thermoelectric elements in series.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: October 19, 1999
    Assignee: Kubota Corporation
    Inventors: Shuzo Kagawa, Isao Endo, Hideki Satake, Michio Yamaguchi
  • Patent number: 4906583
    Abstract: A semiconductor photodetector, such as a PIN photodiode and an avalanche photodiode, comprising an InP substrate, a first InP layer, a GaInAs or GaInAsP light absorbing layer, and a second InP layer. All of the layers are successively grown by a vapor phase epitaxial process wherein the lattice constant of the GaInAs (GaInAsP) layer is larger than that of the InP layer at room temperature. The photodetector has a low dark current.
    Type: Grant
    Filed: August 22, 1988
    Date of Patent: March 6, 1990
    Assignee: Fujitsu Limited
    Inventors: Shuzo Kagawa, Junji Komeno
  • Patent number: 4415370
    Abstract: A semiconductor device, and a method for manufacturing it in which ions of beryllium are implanted into a germanium substrate to form a layer containing p-type impurity material. There after the substrate is heated at a temperature in the range of C. to C. to diffuse the beryllium ions into the substrate so that the concentration of beryllium at the surface of the impurity layer is in the order of 10.sup.17 cm.sup.-3 or more. In one embodiment, a p-type channel stopper is formed locally in a p-type germanium substrate and an n-type active layer is formed in a region surrounded by, and isolated from, the channel stopper region. In another embodiment, a relatively shallow p-type active layer is formed at one part of an n-type germanium substrate and p-type guard ring regions are formed surrounding, and partly overlapping said p-type active layer.
    Type: Grant
    Filed: September 15, 1980
    Date of Patent: November 15, 1983
    Assignee: Fujitsu Limited
    Inventors: Shuzo Kagawa, Tatsunori Shirai, Takao Kaneda, Yasuo Baba