Abstract: A casting mold device includes a lower die and an upper die capable of being attached to or detached from the lower die and is configured to produce a cylinder head having spark plug mounting portions. In particular, the casting mold device includes: i) a plurality of core pin assemblies mounted in the upper die to form the spark plug mounting portions and having cooling air flow paths formed therein, ii) a cooling unit installed on the upper die and including cooling air inlet portions and cooling air outlet portions respectively connected to the cooling air flow paths of the core pin assemblies, and iii) a sealing unit coupled to the cooling unit and the upper die to seal portions between the core pin assemblies and the cooling unit.

Abstract: The present invention relates to low-calorie hot sauces, and more particularly, to hot sauces containing hot spices, acid-resistant thickeners and low-calorie or calorie-free saccharides.

Abstract: The present invention relates to low-calorie hot sauces, and more particularly, to hot sauces containing hot spices, acid-resistant thickeners and low-calorie or calorie-free saccharides.

Abstract: A heat radiation sheet includes a low-hardness insulating heat-radiation layer and a high-heat-radiation insulating layer. Each of the low-hardness insulating heat-radiation layer and the high-heat-radiation insulating layer is formed by mixing a thermoplastic elastomer (TPE), a thermally conductive filler, a flame retardant additive, a process oil, and an additive. A method of manufacturing a heat radiation sheet having a double-layered insulating structure, includes: a first step of forming a mixture by mixing a thermoplastic elastomer (TPE), a thermally conductive filler, a flame retardant additive, a process oil, and an additive; a second step of melt-extruding the mixture at a temperature of 120 ? to 300 ? by a melt extrusion apparatus to from a melt extrudate; a third step of cutting the melt extrudate into a pellet form; and a fourth step of sheeting through melt-extruding the pellet into a sheet form by a melt extrusion apparatus.

Abstract: An integrated circuit includes a processor core, a clock control circuit and a debugging circuit. The processor core processes target software. The clock control circuit determines whether an electrical connection exists between the processor core and an external debugger and generates a determination result. The clock control circuit generates an output clock signal based on the determination result. The external debugger performs a debugging operation for the target software. The output clock signal is selectively activated based on the determination result and an input clock signal. The debugging circuit provides information with respect to the debugging operation for the target software to the external debugger based on the output clock signal.

Abstract: In a method of power control for a system-on-chip, output of at least one of a first wakeup request signal and a second wakeup request signal is controlled such that a time interval between the output of the first wakeup request signal and the output of the second wakeup request signal is greater than or equal to a time interval threshold. The first wakeup request signal and the second wakeup request signal are one of concurrent and consecutive wakeup request signals.

Abstract: A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

Abstract: A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

Abstract: A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

Abstract: An integrated circuit includes a processor core, a clock control circuit and a debugging circuit. The processor core processes target software. The clock control circuit determines whether an electrical connection exists between the processor core and an external debugger and generates a determination result. The clock control circuit generates an output clock signal based on the determination result. The external debugger performs a debugging operation for the target software. The output clock signal is selectively activated based on the determination result and an input clock signal. The debugging circuit provides information with respect to the debugging operation for the target software to the external debugger based on the output clock signal.

Abstract: In a method of power control for a system-on-chip, output of at least one of a first wakeup request signal and a second wakeup request signal is controlled such that a time interval between the output of the first wakeup request signal and the output of the second wakeup request signal is greater than or equal to a time interval threshold. The first wakeup request signal and the second wakeup request signal are one of concurrent and consecutive wakeup request signals.

Abstract: A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

Abstract: Data transfer systems are provided. The data transfer systems include a bridge direct memory access (DMA) device. A first memory is electrically coupled to the bridge DMA device and a second memory is electrically coupled to the bridge DMA device. The bridge DMA device is configured to control data transfer operations between the first memory and the second memory. Direct memory access devices and methods of performing data transfer operations are also provided.