Abstract: A signal adjusting circuit and a receiving end circuit using the same are provided. The signal adjusting circuit is adapted to a peak detector, and includes a first amplifier and a first feedback circuit. The first amplifier receives a first input signal, and amplifies the first input signal to output a first output signal. The first feedback circuit is connected between a first input terminal and a first output terminal of the first amplifier, and is configured to determine a first gain of the first output signal. The peak detector is connected to a first output node of the first feedback circuit, so as to receive a first detection signal and detect a peak value of the first detection signal. The peak detector has a predetermined power input range, and the first feedback circuit keeps the first detection signal within the predetermined power input range.

Abstract: A method of calibrating a radio frequency (RF) circuit that includes an in-phase path (I-path) and a quadrature-phase path (Q-path) is provided. The I-path includes a first modulator and a first component, and the Q-path includes a second modulator and a second component. The modulators and the components respectively include a current DAC (IDAC). The calibration method includes: calibrating DC offsets of the first and second modulators to obtain a first setting value; swapping the I-path and the Q-path, and calibrating DC offsets of the first and second modulators again to obtain a second setting value; setting the IDACs of the first and second modulators with a value of a function of the first and second setting values; calibrating DC offsets of the first and second components; calibrating DC offsets of the first and second modulators; and calibrating DC offsets of the first and second components.

Abstract: A signal adjusting circuit and a receiving end circuit using the same are provided. The signal adjusting circuit is adapted to a peak detector, and includes a first amplifier and a first feedback circuit. The first amplifier receives a first input signal, and amplifies the first input signal to output a first output signal. The first feedback circuit is connected between a first input terminal and a first output terminal of the first amplifier, and is configured to determine a first gain of the first output signal. The peak detector is connected to a first output node of the first feedback circuit, so as to receive a first detection signal and detect a peak value of the first detection signal. The peak detector has a predetermined power input range, and the first feedback circuit keeps the first detection signal within the predetermined power input range.

Abstract: A transceiver control circuit of a transceiver is disclosed including: a receiver circuit; a transmitter circuit; a shared filtering circuit shared by the receiver circuit and the transmitter circuit; a first mode-switch for switching signal input paths of the shared filtering circuit; a second mode-switch for switching signal output paths of the shared filtering circuit; a mode-switch control circuit for controlling the first mode-switch and the second mode-switch; a short-circuit switch coupled between two output terminals of a filter within the shared filtering circuit; and a short-circuit switch control circuit. In a period during which the transceiver transits from a receiving mode to a transmitting mode, the short-circuit switch control circuit turns on the short-circuit switch for a certain period and then turns off the short-circuit switch.

Abstract: A transceiver control circuit of a transceiver is disclosed including: a receiver circuit; a transmitter circuit; a shared filtering circuit shared by the receiver circuit and the transmitter circuit; a first mode-switch for switching signal input paths of the shared filtering circuit; a second mode-switch for switching signal output paths of the shared filtering circuit; a mode-switch control circuit for controlling the first mode-switch and the second mode-switch; a short-circuit switch coupled between two output terminals of a filter within the shared filtering circuit; and a short-circuit switch control circuit. In a period during which the transceiver transits from a receiving mode to a transmitting mode, the short-circuit switch control circuit turns on the short-circuit switch for a certain period and then turns off the short-circuit switch.