Abstract: A method of regulating voltage with a switching regulator is disclosed. The method includes sensing an output voltage provided by the regulator. If the output voltage drops below a low voltage threshold, a burst of one or more current pulses is provided. If the output voltage raises above a high voltage threshold during the burst, discontinuing the burst of current pulses. The method includes counting a number of the one or more current pulses in the burst, and comparing the number of the one or more current pulses with at least one pulse threshold. The upper current threshold is adjusted based on the number of the one or more current pulses.

Abstract: A method of regulating voltage with a switching regulator is disclosed. The method includes sensing an output voltage provided by the regulator. If the output voltage drops below a low voltage threshold, a burst of one or more current pulses is provided. If the output voltage raises above a high voltage threshold during the burst, discontinuing the burst of current pulses. The method includes counting a number of the one or more current pulses in the burst, and comparing the number of the one or more current pulses with at least one pulse threshold. The upper current threshold is adjusted based on the number of the one or more current pulses.

Abstract: A synthetic ripple regulator including frequency control based on a reference clock. The regulator includes an error network, a ripple detector, a combiner, a ripple generator, a comparator network and a phase comparator. The error network provides an error signal indicative of relative error of the output voltage. The ripple detector provides a ramp control signal based on the input and output voltages and a pulse control signal. The combiner adjusts the ramp control signal based on a frequency compensation signal to provide an adjusted ramp control signal. The ripple generator develops a ripple control signal based on the adjusted ramp control signal. The comparator network develops the pulse control signal to control switching based on the error signal and the ripple control signal. The phase comparator compares the pulse control signal with the reference clock and provides the frequency compensation signal.

Abstract: A synthetic ripple regulator including frequency control based on a reference clock. The regulator includes an error network, a ripple detector, a combiner, a ripple generator, a comparator network and a phase comparator. The error network provides an error signal indicative of relative error of the output voltage. The ripple detector provides a ramp control signal based on the input and output voltages and a pulse control signal. The combiner adjusts the ramp control signal based on a frequency compensation signal to provide an adjusted ramp control signal. The ripple generator develops a ripple control signal based on the adjusted ramp control signal. The comparator network develops the pulse control signal to control switching based on the error signal and the ripple control signal. The phase comparator compares the pulse control signal with the reference clock and provides the frequency compensation signal.

Abstract: A DC to DC converter circuit includes circuitry for generating a PWM waveform signal at a phase node of a DC to DC converter responsive to an input voltage and a monitor output voltage. The circuitry further includes a high side switching transistor connected between the input voltage and a phase node and a low side switching transistor connected between the phase node and ground. An output filter is connected to the circuitry for generating the PWM waveform signal. The output filter includes an inductor having a first side connected to the phase node and a second side connected to an output voltage node. Detection circuitry detects zero current crossings in the inductor responsive to a voltage across the high side switching transistor and a voltage across the low side switching transistor.

Abstract: A DC to DC converter circuit includes circuitry for generating a PWM waveform signal at a phase node of a DC to DC converter responsive to an input voltage and a monitor output voltage. The circuitry further includes a high side switching transistor connected between the input voltage and a phase node and a low side switching transistor connected between the phase node and ground. An output filter is connected to the circuitry for generating the PWM waveform signal. The output filter includes an inductor having a first side connected to the phase node and a second side connected to an output voltage node. Detection circuitry detects zero current crossings in the inductor responsive to a voltage across the high side switching transistor and a voltage across the low side switching transistor.

Abstract: A voltage regulator includes a voltage source for providing an input voltage and circuitry for regulating the input voltage to provide an output voltage. The circuitry for regulating the input voltage includes at least a high side switch and a low side switch. A skip mode controller controls the high side switch and the low side switch in order to minimize conduction losses and switching losses within the voltage regulator.

Abstract: A voltage regulator includes a voltage source for providing an input voltage and circuitry for regulating the input voltage to provide an output voltage. The circuitry for regulating the input voltage includes at least a high side switch and a low side switch. A skip mode controller controls the high side switch and the low side switch in order to minimize conduction losses and switching losses within the voltage regulator.

Abstract: A multiple mode battery power supply contains first and second batteries, an external adapter port and a load port. The batteries are selectively connected to a node by way of associated power MOSFET switches. A power bus between the adapter port and the load port contains a MOSFET power switch. Finally a MOSFET power switch couples the node to the power bus. A controller selectively operates the power MOSFETS, to enable the load port to be powered by a selected one of any of an external adapter source of power, and one of the two batteries, while providing cross-conduction isolation among the external adapter source of power, and the batteries.

Abstract: A synchronous switching DC-DC regulator uses the output switching node as the control reference for the main FET gate drive voltage limiting and the appropriate on-time gate drive FET as the controlled switch. The control reference provided by the output switching node times the main FET gate drive voltage setting process and supplies most of the energy necessary to turn on the main FETs. The energy is provided in part from an external inductor coupled to the output switching node.

Abstract: An efficient and practical system and method to determine when a switching DC-DC regulator is under a light load condition. The light load condition is determined by monitoring the switch node voltage to detect a zero-crossing voltage that is load dependent and occurs when the average output current minus half the switching current at the switch node is less than or equal to zero.

Abstract: An energy efficient gate drive technique for binary push-pull MOSFET switching systems having a common switch node with inductive and capacitive elements connected to this common switch node. These energy storage elements on the common switch node can be parasitic in nature or discrete components. This technique recycles otherwise lost PMOS gate drive energy through the switch node, as a storage element, to the NMOS output FET.

Abstract: A DC to DC converter circuit includes circuitry for generating a PWM waveform signal at a phase node of a DC to DC converter responsive to an input voltage and a monitor monitored output voltage. The circuitry further includes a high side switching transistor connected between the input voltage and a phase node and a low side switching transistor connected between the phase node and ground. An output filter is connected to the circuitry for generating the PWM waveform signal. The output filter includes an inductor having a first side connected to the phase node and a second side connected to an output voltage node. Detection circuitry detects zero current crossings in the inductor responsive to a voltage across the high side switching transistor and a voltage across the low side switching transistor.