Abstract: Examples described herein relate to a Transport Layer Security (TLS) offload engine to: based on detection of encrypted data unassociated with a previously detected data header: search for one or more data headers; identify at least two candidate data headers for validation; and based on receipt of an indication that the at least two candidate data headers are valid, perform decryption of received data in one or more packets. In some examples, the TLS offload engine is to: based on receipt of an indication that one or more of the at least two candidate data headers is not a valid header, search for two or more other candidate data headers.

Abstract: When rebuilding a RAID (Redundant Array of Independent Disks) array in which a drive has failed, if another RAID array contains a mirror copy of the of the rebuilding RAID array content, this mirroring RAID array can be used to more rapidly rebuild the RAID array with the failed drive. Data requests to the rebuilding RAID array can be redirected to the mirroring RAID array; data can be transferred from the mirroring RAID array; or a combination of these can be used to finish rebuilding more quickly. When transferring data to the rebuilding array from the mirroring array, the transfer can be performed as a direct memory access (DMA) process independently of the RAID module of either array.

Abstract: Example storage systems and methods provide multichannel communication among subsystems, including a compute complex. A plurality of storage devices, a host, and a compute complex are interconnected over an interconnect fabric. The storage system is configured with a host-storage channel for communication between the host and the plurality of storage devices, host-compute channel for communication between the host and the compute complex, and a compute-storage channel for communication between the compute complex and the storage devices.

Abstract: Example storage systems and methods provide multichannel communication among subsystems, including a compute complex. A plurality of storage devices, a host, and a compute complex are interconnected over an interconnect fabric. The storage system is configured with a host-storage channel for communication between the host and the plurality of storage devices, host-compute channel for communication between the host and the compute complex, and a compute-storage channel for communication between the compute complex and the storage devices.

Abstract: When rebuilding a RAID (Redundant Array of Independent Disks) array in which a drive has failed, if another RAID array contains a mirror copy of the of the rebuilding RAID array content, this mirroring RAID array can be used to more rapidly rebuild the RAID array with the failed drive. Data requests to the rebuilding RAID array can be redirected to the mirroring RAID array; data can be transferred from the mirroring RAID array; or a combination of these can be used to finish rebuilding more quickly. When transferring data to the rebuilding array from the mirroring array, the transfer can be performed as a direct memory access (DMA) process independently of the RAID module of either array.

Abstract: A network node is disclosed. The network node includes a host processor. The network node also includes an integrated circuit. The integrated circuit includes a hardware portion configured to perform a first set of TCP acceleration tasks that require a first speed level. The integrated circuit also includes a network protocol processor configured to perform a second set of TCP acceleration tasks that require a second speed level, which is lower than the first speed level. The integrated circuit further includes an embedded processor configured to perform a third set of TCP acceleration tasks that require a third speed level, which is lower than the second speed level. The network node further includes a plurality of data paths configured to couple the integrated circuit to the host processor, the plurality of data paths being implemented based on different protocols.

Abstract: A method in a target device for partially reordering a plurality of data packets transmitted from a source device. The source device is coupled to the target device via a computer network. The method receiving a first set of data packets from the transmitted device, and ascertaining whether the first set of data packets represents a set of data packets that the target device expects to receive next. If the first set of data packets does not represents the set of data packets that the target expects to receive next, the method includes storing the first set of data packets in a memory buffer of the target device. The storing includes arranging the first set of data packets in the memory buffer such that data packets in the memory buffer, including the first set of data packets, are in order in the memory buffer.

Abstract: A network node is disclosed. The network node includes a host processor. The network node also includes an integrated circuit. The integrated circuit includes a hardware portion configured to perform a first set of TCP acceleration tasks that require a first speed level. The integrated circuit also includes a network protocol processor configured to perform a second set of TCP acceleration tasks that require a second speed level, which is lower than the first speed level. The integrated circuit further includes an embedded processor configured to perform a third set of TCP acceleration tasks that require a third speed level, which is lower than the second speed level. The network node further includes a plurality of data paths configured to couple the integrated circuit to the host processor, the plurality of data paths being implemented based on different protocols.

Abstract: An architecture for implementing host-based security such that data security may be applied whenever the confidential data leaves a host computer or a networked device. The improved method and architecture may be implemented in a single integrated circuit for speed, power consumption, and space-utilization reasons. Within the integrated circuit, a combination of hardware-implemented, network processor-implemented, and software-implemented functions may be provided. The innovative host-based security architecture may offer line-rate IPSec acceleration, TCP acceleration, or both.

Abstract: A method for receiving receive data associated with a bi-directional data flow between a first host computer and a second host computer. The first host computer and the second host computer are coupled via a computer network. The method includes storing receive-facilitating parameters employed for the receiving the receive data in a first control block. The first control block is implemented in the first host computer and associated with the bi-directional data flow. The receiving the receive data is performed in accordance with the TCP protocol. The method also includes employing the receive-facilitating parameters in the first control block to facilitate receiving a given portion of the receive data at the first host computer from the second computer.

Abstract: The present invention provides for a method and system for verifying hardware operation of an Application Specific Integrated Circuit (“ASIC”) chip. The ASIC includes microcode logic for enabling Transmission Control Protocol/Internet Protocol (“TCP/IP”) processing. The method is performed in a system that includes a first computing device having a processor and computer code for simulating a computing device that includes the ASIC. Wherein the ASIC is tested against a conventional TCP/IP stack included in a second computing device coupled to the first computing device.

Abstract: The present invention provides for a method and protocol for high bandwidth, low-latency and reliable transfer of variable length FC Frames over the Gigabit Ethernet.

Abstract: A method for exchanging data in a first host computer coupled to a network. The network is also coupled to a second host computer. The method includes employing a first Transmit Control Block (Tx TCB) to facilitate transmitting first data associated with a bi-directional data flow from the first host computer to the second host computer. The first data is transmitted using the TCP protocol. The first Tx TCB is associated with the first host computer and is configured for storing transmit-facilitating parameters associated with the transmitting the first data using the TCP protocol. The method also includes employing a first Receive Control Block (Rx TCB) to facilitate receiving second data associated with the bi-directional data flow. The second data is transmitted from the second host computer to the first host computer using the TCP protocol.

Abstract: A method for transmitting transmit data associated with a bi-directional data flow between a first host computer and a second host computer. The first host computer and the second host computer are coupled via a computer network. The method includes storing transmit-facilitating parameters employed for the transmitting the transmit data in a first control block. The first control block is implemented in the first host computer and associated with the bi-directional data flow. The transmitting the transmit data is performed in accordance with the TCP protocol. The method also includes employing the transmit-facilitating parameters in the first control block to facilitate servicing a transmit request pertaining to a given portion of the transmit data from the first host computer to the second computer.

Abstract: A method for receiving receive data associated with a bi-directional data flow between a first host computer and a second host computer. The first host computer and the second host computer are coupled via a computer network. The method includes storing receive-facilitating parameters employed for the receiving the receive data in a first control block. The first control block is implemented in the first host computer and associated with the bi-directional data flow. The receiving the receive data is performed in accordance with the TCP protocol. The method also includes employing the receive-facilitating parameters in the first control block to facilitate receiving a given portion of the receive data at the first host computer from the second computer.

Abstract: A method for transmitting transmit data associated with a bi-directional data flow between a first host computer and a second host computer. The first host computer and the second host computer are coupled via a computer network. The method includes storing transmit-facilitating parameters employed for the transmitting the transmit data in a first control block. The first control block is implemented in the first host computer and associated with the bi-directional data flow. The transmitting the transmit data is performed in accordance with the TCP protocol. The method also includes employing the transmit-facilitating parameters in the first control block to facilitate servicing a transmit request pertaining to a given portion of the transmit data from the first host computer to the second computer.

Abstract: A method for exchanging data in a first host computer coupled to a network. The network is also coupled to a second host computer. The method includes employing a first Tx Transmit Control Block (Tx TCB) to facilitate transmitting first data associated with a bi-directional data flow from the first host computer to the second host computer. The first data is transmitted using the TCP protocol. The first Tx TCB is associated with the first host computer and is configured for storing transmit-facilitating parameters associated with the transmitting the first data using the TCP protocol. The method also includes employing a first Rx Transmit Control Block (Rx TCB) to facilitate receiving second data associated with the bi-directional data flow. The second data is transmitted from the second host computer to the first host computer using the TCP protocol.

Abstract: A method in a target device for partially reordering a plurality of data packets transmitted from a source device. The source device is coupled to the target device via a computer network. The method receiving a first set of data packets from the transmitted device, and ascertaining whether the first set of data packets represents a set of data packets that the target device expects to receive next. If the first set of data packets does not represents the set of data packets that the target expects to receive next, the method includes storing the first set of data packets in a memory buffer of the target device. The storing includes arranging the first set of data packets in the memory buffer such that data packets in the memory buffer, including the first set of data packets, are in order in the memory buffer.

Abstract: An architecture for implementing host-based security such that data security may be applied whenever the confidential data leaves a host computer or a networked device. The improved method and architecture may be implemented in a single integrated circuit for speed, power consumption, and space-utilization reasons. Within the integrated circuit, a combination of hardware-implemented, network processor-implemented, and software-implemented functions may be provided. The innovative host-based security architecture may offer line-rate IPSec acceleration, TCP acceleration, or both.

Abstract: The present invention provides for a method and system for verifying hardware operation of an Application Specific Integrated Circuit (“ASIC”) chip. The ASIC includes microcode logic for enabling Transmission Control Protocol/Internet Protocol (“TCP/IP”) processing. The method is performed in a system that includes a first computing device having a processor and computer code for simulating a computing device that includes the ASIC. Wherein the ASIC is tested against a conventional TCP/IP stack included in a second computing device coupled to the first computing device.