Patents by Inventor Slavo Kicin

Slavo Kicin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079279
    Abstract: A power semiconductor module (34), comprising a substrate (12) which carries a plurality of power semiconductor devices (10), wherein the plurality of power semiconductor devices (10) comprises a first group of power semiconductor devices (10) and a second group of at least one power semiconductor device (10). The first group of power semiconductor devices (10) consists of at least two non-damaged power semiconductor devices (10b, 10c), and the second group of power semiconductor devices (10) consists of at least one damaged power semiconductor device (10a). The at least two non-damaged power semiconductor devices (10b, 10c) are electrically interconnected in a parallel configuration, and the second group of at least one power semiconductor device (10) is electrically separated from the members of the first group of power semiconductor devices (10). The disclosure further relates to an electrical converter and a method for manufacturing a power semiconductor module (34).
    Type: Application
    Filed: December 16, 2021
    Publication date: March 7, 2024
    Inventors: Slavo KICIN, Gernot RIEDEL, Jürgen SCHUDERER, Fabian MOHN
  • Publication number: 20230335472
    Abstract: The invention relates to a power semiconductor module comprising a conductive base, a conductive top, and at least two power semiconductor devices arranged between the conductive base and the conductive top. The semiconductor devices are each configured for a current of at least 1 A and/or for a voltage of at least 50 V. An insulating spacer layer is arranged on the power semiconductor devices and at least partially between the conductive base and the conductive top. At least two vertical connection elements pass from the power semiconductor devices through the spacer layer and conductively connect the conductive top with the power semiconductor devices. The spacer layer and the vertical connection elements are configured for compensating height differences of the power semiconductor devices.
    Type: Application
    Filed: September 23, 2021
    Publication date: October 19, 2023
    Inventors: Juergen SCHUDERER, Chunlei LIU, Slavo KICIN, Giovanni SALVATORE, Fabian MOHN
  • Patent number: 11742312
    Abstract: A power semiconductor module comprises abase plate (1); a semiconductor chip (2) disposed on and in contact with a top surface of the base plate (1), a preform (3) disposed on and in contact with a top surface of the semiconductor chip (2); and a pressing element (4) in contact with and applying a pressure onto a top surface of the preform (3). The preform (3) comprises a first electrically conductive layer (6) and a second electrically conductive layer (5). The first electrically conductive layer (6) has at least one protrusion (7) protruding towards the top surface of the semiconductor chip (2) and defining a recess (9) in the first electrically conductive layer (6) of the preform (3), wherein the recess (9) may annularly surround the protrusion (7). The at least one protrusion (7) is made from the same material as the first electrically conducting layer (6) and integrally formed with it or the first electrically conducting layer (6) and the at least one protrusion (7) are made from different materials.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: August 29, 2023
    Assignee: Hitachi Energy Switzerland AG
    Inventors: Didier Cottet, Slavo Kicin
  • Patent number: 11652091
    Abstract: A solid state switching device, such as a solid state circuit breaker, includes at least one heat sink, a control electronics printed circuit board (PCB), and power electronics. The power electronics are useful to regulate the flow of current from one terminal of the solid state switching device to another terminal. The power electronics can include one or more solid state devices such as FETs, Thyristors, Thyristors+SiC JFET in parallel, IGBTs, and IGCTs. The control PCB can include a variety of circuit elements useful to perform the function of a gate driver useful to activate the solid state device of the power electronics. The heat sink includes one or more signal vias formed therethrough to permit nesting of the control PCB within the heat sink.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: May 16, 2023
    Assignee: ABB Schweiz AG
    Inventors: Giovanni Salvatore, Slavo Kicin
  • Publication number: 20230112582
    Abstract: In one embodiment, a power module device includes a base plate, an electrically insulating ceramic layer on the base plate, and an electrically insulating first insulating layer on the ceramic layer. The first insulating layer includes a prepreg material. An electrically conductive lead frame is disposed on the first insulating layer and electrically insulated therefrom. A power semiconductor device disposed on the lead frame and embedded between the lead frame and a second insulating layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: April 13, 2023
    Inventors: Slavo Kicin, Chunlei Liu, Andrey Petrov, Gernot Riedel
  • Publication number: 20230116118
    Abstract: A power semiconductor module includes a semiconductor board and a number of semiconductor chips attached to the semiconductor board. Each semiconductor chip has two power electrodes. An adapter board is attached to the semiconductor board above the semiconductor chips. The adapter board includes a terminal area for each semiconductor chip on a side facing away from the semiconductor board. The adapter board, in each terminal area, provides a power terminal for each power electrode of the semiconductor chip associated with the terminal area. Each power terminal is electrically connected via a respective vertical post below the terminal area with a respective semiconductor chip and each of the power terminals has at least two plug connectors. Jumper connectors interconnect the plug connectors for electrically connecting power electrodes of different semiconductor chips.
    Type: Application
    Filed: January 28, 2021
    Publication date: April 13, 2023
    Inventors: Juergen Schuderer, Slavo Kicin, Fabian Mohn, Gernot Riedel
  • Publication number: 20220399279
    Abstract: A power semiconductor module includes a plurality of semiconductor switches arranged in a plurality of groups. Each semiconductor switch has a first terminal and a second terminal having a controlled path therebetween and a control terminal. A plurality of first group contacts are each connected to the first terminals of the semiconductor switches of a respective group and a plurality of second group contacts are each connected to the second terminals of the semiconductor switches of the respective group. A plurality of control group contacts are each connected to the control terminals of the semiconductor switches of the respective group. An interconnection bridge connects the control group contacts and the first group contacts of the plurality of groups. The interconnection bridge has a layer structure with a first conductive layer and a second conductive layer being separated by an insulating layer.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 15, 2022
    Inventors: Slavo Kicin, Arne Schroeder, Farhad Yaghoubi
  • Publication number: 20220238493
    Abstract: A power semiconductor module includes a main substrate and power semiconductor chips. Each power semiconductor chip is bonded to the main conductive layer with the first power electrode. A first group of the power semiconductor chips is connected in parallel via the second power electrodes and a second group of the power semiconductor chips is connected in parallel via the second power electrodes. The module also includes a first insulation layer and a first conductive layer overlying the first insulation layer as well as a second insulation layer and a second conductive layer overlying the second insulation layer. The first conductive layer provides a first gate conductor area and a first auxiliary emitter conductor area for the first group. The second conductive layer provides a second gate conductor area and a second auxiliary emitter conductor area for the second group.
    Type: Application
    Filed: April 2, 2020
    Publication date: July 28, 2022
    Inventors: Arne Schroeder, Slavo Kicin, Fabian Mohn, Juergen Schuderer
  • Publication number: 20220166423
    Abstract: Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising an outer housing; a power electronics board disposed within the housing and including a semiconductor switch structured to selectively conduct a current between a first power terminal and a second power terminal; a first heat sink coupled to the power electronics board; a plurality of thermally conductive connectors; a second heat sink coupled to the plurality of thermally conductive connectors, a control electronics board structured to control the semiconductor switch, the control electronics board being located within an enclosure formed of the second heat sink, the plurality of thermally conductive connectors, and the power electronics board.
    Type: Application
    Filed: November 23, 2020
    Publication date: May 26, 2022
    Inventors: Giovanni Salvatore, Slavo Kicin, Fabian Mohn
  • Patent number: 11343943
    Abstract: Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising an outer housing; a power electronics board disposed within the housing and including a semiconductor switch structured to selectively conduct a current between a first power terminal and a second power terminal; a first heat sink coupled to the power electronics board; a plurality of thermally conductive connectors; a second heat sink coupled to the plurality of thermally conductive connectors, a control electronics board structured to control the semiconductor switch, the control electronics board being located within an enclosure formed of the second heat sink, the plurality of thermally conductive connectors, and the power electronics board.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 24, 2022
    Assignee: ABB SCHWEIZ AG
    Inventors: Giovanni Salvatore, Slavo Kicin, Fabian Mohn
  • Publication number: 20220028822
    Abstract: A power semiconductor module comprises a base plate (1); a semiconductor chip (2) disposed on and in contact with a top surface of the base plate (1), a preform (3) disposed on and in contact with a top surface of the semiconductor chip (2); and a pressing element (4) in contact with and applying a pressure onto a top surface of the preform (3). The preform (3) comprises a first electrically conductive layer (6) and a second electrically conductive layer (5). The first electrically conductive layer (6) has at least one protrusion (7) protruding towards the top surface of the semiconductor chip (2) and defining a recess (9) in the first electrically conductive layer (6) of the preform (3), wherein the recess (9) may annularly surround the protrusion (7). The at least one protrusion (7) is made from the same material as the first electrically conducting layer (6) and integrally formed with it or the first electrically conducting layer (6) and the at least one protrusion (7) are made from different materials.
    Type: Application
    Filed: October 17, 2019
    Publication date: January 27, 2022
    Inventors: Didier Cottet, Slavo Kicin
  • Publication number: 20210398958
    Abstract: A solid state switching device, such as a solid state circuit breaker, includes at least one heat sink, a control electronics printed circuit board (PCB), and power electronics. The power electronics are useful to regulate the flow of current from one terminal of the solid state switching device to another terminal. The power electronics can include one or more solid state devices such as FETs, Thyristors, Thyristors+SiC JFET in parallel, IGBTs, and IGCTs. The control PCB can include a variety of circuit elements useful to perform the function of a gate driver useful to activate the solid state device of the power electronics. The heat sink includes one or more signal vias formed therethrough to permit nesting of the control PCB within the heat sink.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Inventors: Giovanni Salvatore, Slavo Kicin
  • Publication number: 20210400815
    Abstract: A solid state switching device, such as a solid state circuit breaker, includes at least one heat sink, a control electronics printed circuit board (PCB), and power electronics. The power electronics are useful to regulate the flow of current from one terminal of the solid state switching device to another terminal. The power electronics can include one or more solid state devices such as FETs, Thyristors, Thyristors+SiC JFET in parallel, IGBTs, and IGCTs. The control PCB can include a variety of circuit elements useful to perform the function of a gate driver useful to activate the solid state device of the power electronics. The control electronics can be positioned laterally to the power electronics and spanning from a heat sink positioned on one side of the power electronics to a heat sink positioned on an opposing side of the power electronics.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Inventors: Giovanni Salvatore, Slavo Kicin
  • Patent number: 10699986
    Abstract: An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: June 30, 2020
    Assignee: ABB Schweiz AG
    Inventors: Daniel Kearney, Jürgen Schuderer, Slavo Kicin, Liliana Duarte
  • Patent number: 10283454
    Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: May 7, 2019
    Assignee: ABB Schweiz AG
    Inventors: Felix Traub, Fabian Mohn, Juergen Schuderer, Daniel Kearney, Slavo Kicin
  • Publication number: 20190131211
    Abstract: An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 2, 2019
    Inventors: Daniel Kearney, Jürgen Schuderer, Slavo Kicin, Liliana Duarte
  • Patent number: 10224424
    Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: March 5, 2019
    Assignee: ABB Schweiz AG
    Inventors: Samuel Hartmann, Didier Cottet, Slavo Kicin
  • Publication number: 20180090441
    Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane.
    Type: Application
    Filed: November 21, 2017
    Publication date: March 29, 2018
    Inventors: Felix Traub, Fabian Mohn, Juergen Schuderer, Daniel Kearney, Slavo Kicin
  • Patent number: 9668376
    Abstract: An electric converter system, including a housing configured to receive a dielectric fluid, at least two electric modules, each including a first space and a second space, the first space including a connecting portion and a cooling system configured to circulate the dielectric fluid to cool the electric modules. The converter system further includes an inter module bus bar portion including a complementary connecting portion, whereby the connecting portion is configured to be connected to the complementary connecting portion of the inter module bus bar portion, whereby the inter module bus bar portion is configured to interconnect one of the at least two electric modules with the other of the at least two electric modules, said one electric module being proximate to said other electric module, and whereby the connecting portion, the first space and the second space of each electric module are arranged in series.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: May 30, 2017
    Assignee: ABB Schweiz AG
    Inventors: Gernot Riedel, Slavo Kicin, Thomas Gradinger
  • Publication number: 20160351697
    Abstract: A semiconductor module comprises a semiconductor chip comprising a semiconductor switch having a collector, emitter and gate, a collector terminal connected to the collector, gate terminal connected to the gate, an emitter terminal connected to the emitter via an emitter conductor path having an emitter inductance, an auxiliary emitter terminal connected to the emitter, a first conductor path connected to the emitter, and a second conductor path connected to the emitter having a different mutually inductive coupling with the emitter conductor path as the first conductor path. The first conductor path and the second conductor path are connectable to the auxiliary emitter terminal and/or the first conductor path is connected to the auxiliary emitter terminal and the second conductor path is connected to a second auxiliary emitter terminal.
    Type: Application
    Filed: August 15, 2016
    Publication date: December 1, 2016
    Inventors: Samuel Hartmann, Didier Cottet, Slavo Kicin