Patents by Inventor Sohichiroh HOSODA

Sohichiroh HOSODA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220094906
    Abstract: A semiconductor device of an embodiment includes two hardware accelerators, and a DCLS (dual-core lock-step) controller. The DCLS controller operates the hardware accelerators to respectively perform a first function and a second function in each execution cycle among multiple execution cycles, and determines a timing of an execution cycle at which the two hardware accelerators are operated with a dual-core lock-step configuration among the execution cycles included in a fault detection time interval (FDTI).
    Type: Application
    Filed: March 12, 2021
    Publication date: March 24, 2022
    Inventor: Sohichiroh HOSODA
  • Patent number: 10631016
    Abstract: A dynamic range compression device compresses multiple signal data pertaining to a common frame based on a total signal intensity range from multiple signals and limits compression of one or more signal data that are not saturated. The dynamic range compression device includes a total signal intensity circuit that calculates total intensity based on all of the signal data, a recalculation circuit that calculates a new compressed value for each signal data based on the calculation of total signal intensity to within a narrower range, a saturation circuit that determines whether one or more signal data after compression exceeds a predetermined value and are saturated signal data, and a data distribution circuit that decreases the value of the one or more saturated signal data and that increases the value of one or more non-saturated signal data.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: April 21, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Sohichiroh Hosoda
  • Patent number: 10298888
    Abstract: According to an embodiment, an adaptive analyzer of sensitivity difference of same color pixels analyzes a sensitivity difference of same color pixels of an image sensor. The same color pixels are divided into first and second groups. The adaptive analyzer includes an accumulator, a calculator, a correction ratio controller and a memory. The accumulator is configured to cumulatively add pixel values of pixels in the first group and pixel values of pixels in the second group per macro block, respectively, on an image captured in the image sensor. The calculator is configured to calculate a ratio between a cumulatively added value of the pixels in the first group and a cumulatively added value of the pixels in the second group in the macro block. The correction ratio controller is configured to set a correction ratio for the sensitivity difference based on the ratio per macro block.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: May 21, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Sohichiroh Hosoda
  • Patent number: 10275864
    Abstract: According to one embodiment, an image processing device includes a luminance acquiring unit and a local tone-mapping unit. The luminance acquiring unit acquires a luminance signal of a target pixel in an image by performing filter processing on an image signal. The luminance acquiring unit generates a luminance signal by blending a first luminance-filter result obtained by a first luminance filter and a second luminance-filter result obtained by a second luminance filter. The local tone-mapping unit performs local tone mapping of the luminance signal.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: April 30, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Sohichiroh Hosoda
  • Publication number: 20190089993
    Abstract: A dynamic range compression device compresses multiple signal data pertaining to a common frame based on a total signal intensity range from multiple signals and limits compression of one or more signal data that are not saturated. The dynamic range compression device includes a total signal intensity circuit that calculates total intensity based on all of the signal data, a recalculation circuit that calculates a new compressed value for each signal data based on the calculation of total signal intensity to within a narrower range, a saturation circuit that determines whether one or more signal data after compression exceeds a predetermined value and are saturated signal data, and a data distribution circuit that decreases the value of the one or more saturated signal data and that increases the value of one or more non-saturated signal data.
    Type: Application
    Filed: February 28, 2018
    Publication date: March 21, 2019
    Inventor: Sohichiroh HOSODA
  • Publication number: 20180075588
    Abstract: According to one embodiment, an image processing device includes a luminance acquiring unit and a local tone-mapping unit. The luminance acquiring unit acquires a luminance signal of a target pixel in an image by performing filter processing on an image signal. The luminance acquiring unit generates a luminance signal by blending a first luminance-filter result obtained by a first luminance filter and a second luminance-filter result obtained by a second luminance filter. The local tone-mapping unit performs local tone mapping of the luminance signal.
    Type: Application
    Filed: February 14, 2017
    Publication date: March 15, 2018
    Inventor: Sohichiroh Hosoda
  • Publication number: 20170064230
    Abstract: According to an embodiment, an adaptive analyzer of sensitivity difference of same color pixels analyzes a sensitivity difference of same color pixels of an image sensor. The same color pixels are divided into first and second groups. The adaptive analyzer includes an accumulator, a calculator, a correction ratio controller and a memory. The accumulator is configured to cumulatively add pixel values of pixels in the first group and pixel values of pixels in the second group per macro block, respectively, on an image captured in the image sensor. The calculator is configured to calculate a ratio between a cumulatively added value of the pixels in the first group and a cumulatively added value of the pixels in the second group in the macro block. The correction ratio controller is configured to set a correction ratio for the sensitivity difference based on the ratio per macro block.
    Type: Application
    Filed: February 11, 2016
    Publication date: March 2, 2017
    Inventor: Sohichiroh Hosoda
  • Publication number: 20140289483
    Abstract: A shared memory controller controls access to a shared memory by a plurality of master devices based on access requests received from the plurality of master devices. The shared memory control unit includes a memory access arbiter that receives a lock reading request to lock a portion of shared memory, a waiting queue that stores the access requests, and a lock transaction controller. The lock transaction controller receives a plurality of access requests after the lock reading request is received by the memory access arbiter. The lock transaction controller stores the access requests in the waiting queue, and receives an unlock writing request to unlock the portion of shared memory. After the portion of shared memory is unlocked, the lock transaction controller releases the access requests from the waiting queue.
    Type: Application
    Filed: March 24, 2014
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Sohichiroh HOSODA, Jun TANABE, Hiroyuki USUI