Patents by Inventor Soichiro MIZUSAKI
Soichiro MIZUSAKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11903222Abstract: A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.Type: GrantFiled: March 17, 2023Date of Patent: February 13, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Yumin Kim, Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Youngjin Cho
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Patent number: 11894053Abstract: A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.Type: GrantFiled: January 19, 2023Date of Patent: February 6, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Youngjin Cho, Jungho Yoon, Seyun Kim, Jinhong Kim, Soichiro Mizusaki
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Patent number: 11856873Abstract: A variable resistance memory may include first and second conductive elements spaced apart from each other on a variable resistance layer. The variable resistance layer may include first to third oxide layers sequentially arranged in a direction perpendicular to a direction in which the first and second conductive elements are arranged. A dielectric constant of the second oxide layer may be greater than dielectric constants of the first and third oxide layers.Type: GrantFiled: August 5, 2021Date of Patent: December 26, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Soichiro Mizusaki, Doyoon Kim, Seyun Kim, Yumin Kim, Jinhong Kim, Youngjin Cho
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Publication number: 20230337555Abstract: A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.Type: ApplicationFiled: June 21, 2023Publication date: October 19, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Seyun KIM, Jinhong KIM, Soichiro MIZUSAKI, Jungho YOON, Youngjin CHO
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Patent number: 11723289Abstract: A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.Type: GrantFiled: May 15, 2020Date of Patent: August 8, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Jungho Yoon, Youngjin Cho
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Publication number: 20230225138Abstract: A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.Type: ApplicationFiled: March 17, 2023Publication date: July 13, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Yumin KIM, Seyun KIM, Jinhong KIM, Soichiro MIZUSAKI, Youngjin CHO
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Patent number: 11682717Abstract: Disclosed are a memory device including a vertical stack structure and a method of manufacturing the memory device. The memory device includes an insulating structure having a shape including a first surface and a protrusion portion protruding in a first direction from the first surface, a recording material layer covering the protrusion portion along a protruding shape of the protrusion portion and extending to the first surface on the insulating structure a channel layer on the recording material layer along a surface of the recording material layer, a gate insulating layer on the channel layer, and a gate electrode formed at a location on the gate insulating layer to face a second surface which is a protruding upper surface of the protrusion portion, wherein a void exists between the gate electrode and the insulating structure, defined by the insulating structure and the recording material layer.Type: GrantFiled: August 27, 2021Date of Patent: June 20, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Yumin Kim, Doyoon Kim, Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Youngjin Cho
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Patent number: 11672131Abstract: A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.Type: GrantFiled: May 11, 2021Date of Patent: June 6, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Yumin Kim, Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Youngjin Cho
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Publication number: 20230154534Abstract: A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.Type: ApplicationFiled: January 19, 2023Publication date: May 18, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Youngjin Cho, Jungho Yoon, Seyun Kim, Jinhong Kim, Soichiro Mizusaki
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Publication number: 20230086939Abstract: A nonvolatile memory device and an operating method thereof are provided. The nonvolatile memory device includes a memory cell array including first to third memory cells sequentially arranged in a vertical stack structure and a control logic configured to apply a first non-selection voltage to the first memory cell, apply a second non-selection voltage different from the first non-selection voltage to the third memory cell, apply a selection voltage to the second memory cell, and select the second memory cell as a selection memory cell.Type: ApplicationFiled: November 23, 2022Publication date: March 23, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Yumin KIM, Seyun KIM, Jinhong KIM, Soichiro MIZUSAKI, Youngjin CHO
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Publication number: 20230083978Abstract: A semiconductor device is provided. The semiconductor device includes a substrate a substrate, a first electrode structure on the substrate, the first electrode structure including first insulating patterns and first electrode patterns, the first insulating patterns alternately stacked with the first electrode patterns, a second electrode pattern on a sidewall of the first electrode structure, and a data storage film on a sidewall of the second electrode pattern. The data storage film has a variable resistance.Type: ApplicationFiled: November 17, 2022Publication date: March 16, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jungho YOON, Soichiro MIZUSAKI, Youngjin CHO
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Publication number: 20230078373Abstract: A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.Type: ApplicationFiled: November 17, 2022Publication date: March 16, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Seyun KIM, Jinhong KIM, Soichiro MIZUSAKI, Jungho YOON, Youngjin CHO
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Patent number: 11605428Abstract: A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.Type: GrantFiled: January 12, 2021Date of Patent: March 14, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Youngjin Cho, Jungho Yoon, Seyun Kim, Jinhong Kim, Soichiro Mizusaki
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Patent number: 11575084Abstract: A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.Type: GrantFiled: August 21, 2020Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Jungho Yoon, Youngjin Cho
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Patent number: 11574677Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.Type: GrantFiled: July 26, 2021Date of Patent: February 7, 2023Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Jungho Yoon, Cheol Seong Hwang, Soichiro Mizusaki, Youngjin Cho
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Patent number: 11557723Abstract: A semiconductor device is provided. The semiconductor device includes a substrate a substrate, a first electrode structure on the substrate, the first electrode structure including first insulating patterns and first electrode patterns, the first insulating patterns alternately stacked with the first electrode patterns, a second electrode pattern on a sidewall of the first electrode structure, and a data storage film on a sidewall of the second electrode pattern. The data storage film has a variable resistance.Type: GrantFiled: October 21, 2019Date of Patent: January 17, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jungho Yoon, Soichiro Mizusaki, Youngjin Cho
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Patent number: 11545224Abstract: A nonvolatile memory device and an operating method thereof are provided. The nonvolatile memory device includes a memory cell array including first to third memory cells sequentially arranged in a vertical stack structure and a control logic configured to apply a first non-selection voltage to the first memory cell, apply a second non-selection voltage different from the first non-selection voltage to the third memory cell, apply a selection voltage to the second memory cell, and select the second memory cell as a selection memory cell.Type: GrantFiled: May 3, 2021Date of Patent: January 3, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Yumin Kim, Seyun Kim, Jinhong Kim, Soichiro Mizusaki, Youngjin Cho
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Publication number: 20220310827Abstract: Disclosed are a memory device including a vertical stack structure and a method of manufacturing the memory device. The memory device includes an insulating structure having a shape including a first surface and a protrusion portion protruding in a first direction from the first surface, a recording material layer covering the protrusion portion along a protruding shape of the protrusion portion and extending to the first surface on the insulating structure a channel layer on the recording material layer along a surface of the recording material layer, a gate insulating layer on the channel layer, and a gate electrode formed at a location on the gate insulating layer to face a second surface which is a protruding upper surface of the protrusion portion, wherein a void exists between the gate electrode and the insulating structure, defined by the insulating structure and the recording material layer.Type: ApplicationFiled: August 27, 2021Publication date: September 29, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Yumin KIM, Doyoon KIM, Seyun KIM, Jinhong KIM, Soichiro MIZUSAKI, Youngjin CHO
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Publication number: 20220302380Abstract: A variable resistance memory may include first and second conductive elements spaced apart from each other on a variable resistance layer. The variable resistance layer may include first to third oxide layers sequentially arranged in a direction perpendicular to a direction in which the first and second conductive elements are arranged. A dielectric constant of the second oxide layer may be greater than dielectric constants of the first and third oxide layers.Type: ApplicationFiled: August 5, 2021Publication date: September 22, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Soichiro MIZUSAKI, Doyoon KIM, Seyun KIM, Yumin KIM, Jinhong KIM, Youngjin CHO
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Publication number: 20220246679Abstract: A variable resistance memory device includes a support layer including an insulating material; a variable resistance layer on the support layer and including a variable resistance material; a capping layer between the support layer and the variable resistance layer and protecting the variable resistance layer; a channel layer on the variable resistance layer; a gate insulating layer on the channel layer; and a plurality of gate electrodes and a plurality of insulators alternately and repeatedly arranged on the gate insulating layer in a first direction parallel with the channel layer. The capping layer may maintain oxygen vacancies formed in the variable resistance layer.Type: ApplicationFiled: November 10, 2021Publication date: August 4, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Youngjin CHO, Seyun KIM, Yumin KIM, Doyoon KIM, Jinhong KIM, Soichiro MIZUSAKI