Patents by Inventor Soichiro Yasunaga

Soichiro Yasunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5386114
    Abstract: Apparatus for helping predict the occurrence of an earthquake or a volcanic eruption by detecting and recording the direction of a neutron flow generated in the earth's magma and the intensity of the neutron activity.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: January 31, 1995
    Assignee: Riken Denshi Co., Ltd.
    Inventor: Soichiro Yasunaga
  • Patent number: 5241175
    Abstract: This invention provides method and apparatus to predict accurately volcanic eruptions or the occurrence of earthquakes without the use of a seismometer or an incline level meter. The apparatus includes a neutron sensor, a counter and a displaying device to indicate an integrated count number or changes in count number of neutrons radiated from the earth's magma with the prediction being performed on basis of the changing count or integrated count number for a given period of time.
    Type: Grant
    Filed: November 26, 1991
    Date of Patent: August 31, 1993
    Assignee: Riken Denshi Co., Ltd.
    Inventor: Soichiro Yasunaga
  • Patent number: 4994733
    Abstract: A potentiometer used with a voltmeter has an impedance transformer to which a voltage to be measured is applied, a bank of resistors acting collectively as a variable resistor and having switches connected in parallel across the respective resistors of the bank, a switch control circuit, and a multiplier-setting circuit, all connected in series. The resistors have resistances r, 2r, 4r, 8r, . . . , 2.sup.n-1 r or 10.sup.0 (r, 2r, 4r, 8r), 10.sup.1 (r, 2r, 4r, 8r), . . . , 10.sup.n-1 (r, 2r, 4r, 8r), where r is a minimum, or unit, resistance value. The unit resistance value r multiplied by a multiplier N of two or more digits is equal to the resistance value of the variable resistor bank.
    Type: Grant
    Filed: January 31, 1989
    Date of Patent: February 19, 1991
    Assignee: Riken Denshi Co., Ltd.
    Inventor: Soichiro Yasunaga
  • Patent number: 4980570
    Abstract: The location of an aperture surrounded by a region of different brightness on a plane surface is achieved by line scanning the surface with an optical scanner while shifting the line position stepwise in an orthogonal direction. A change in brightness as the scanner passes between the region and aperture creates in the scanning signals, a pulse indication of the aperture position. Signals for a progressively changing group of successive scanning lines large enough in number to span a given aperture on either side in the orthogonal direction and include a signal for at least one line intersecting the aperture; i.e., three or more consecutive lines, are synchronously compared by time delaying the earlier signals to coincide with the real time signal. The coincidence of one or more line signals indicative of an aperture directly preceded and followed by a line signal free of an aperture indication signifies the presence of an aperture.
    Type: Grant
    Filed: February 23, 1990
    Date of Patent: December 25, 1990
    Assignee: Riken Denshi Co., Ltd
    Inventors: Soichiro Yasunaga, Kensuke Hasegawa
  • Patent number: 4963885
    Abstract: A thermal print head includes a plurality, e.g., three of delay shift registers operating by a clock-controlled shift scan to receive dot print signals from a dot print signal generating circuit. The delay registers have a number of addresses corresponding to the number of dot print elements in the printer head. The dot print signals from the delay shift registers are applied to an OR gate connected to the print registers for the dot print elements. With this construction, the shift scan cycle t is set so that t=T (n+1), where T is the least print cycle under normal printing conditions and n is the number of delay shift registers. Printing is effected with a high resolving power to restrain any decline in coloring properties using interpolation dot print signals derived from real time print signals by the delay shift registers.
    Type: Grant
    Filed: February 23, 1990
    Date of Patent: October 16, 1990
    Assignee: Oshida Patent Agency
    Inventors: Soichiro Yasunaga, Isamu Watanabe
  • Patent number: 4636772
    Abstract: A multiple function type D/A converter utilizing a ladder type resistance circuit, and capable of other mathematical functions in addition to the D/A conversion, having a series resistance circuit consisting of N number of resistors R2.sub.1 .about.R2.sub.n each having a resistance value R connected in series between an output terminal V.sub.o and one side of a terminal resistor R.sub.o which has a resistance value 2R and is connected on its other side to ground, such series circuit including a resistor connecting point between each adjacent pair of resistors R.sub.0, R2.sub.1 .about.R2.sub.N, and branching in parallel therefrom N+1 number of groups of parallel resistors 01.about.0n, 11.about.1n, . . . N1.about.
    Type: Grant
    Filed: May 22, 1985
    Date of Patent: January 13, 1987
    Assignee: Riken Denshi Co. Ltd.
    Inventor: Soichiro Yasunaga
  • Patent number: 4461960
    Abstract: A switching circuit formed of a plurality of parallel channels, each channel including a control transistor, a compensating transistor and an output transistor arranged in series. The analog signals to be switched are applied each to an input terminal of a channel which is connected to the collector of the control transistor which is in turn connected to the base of the compensating transistor. A control signal is applied to a control input terminal for each channel which is connected to the base of the control transistor thereof having its emitter grounded. Thus, the application or not of a control pulse to the control terminal and then to the control transistor base determines whether an analog signal at the input terminal for the channel is applied to the base of the compensating transistor.
    Type: Grant
    Filed: November 4, 1983
    Date of Patent: July 24, 1984
    Inventor: Soichiro Yasunaga
  • Patent number: 4152587
    Abstract: A curve line reader of the type wherein a recording medium carrying an optically visible curve line is caused to move relatively to an electronic camera tube which electronically scans an optical image of the medium along a locus extending transversely of the recording direction to generate a video output signal containing pulses produced by the impingement of the tube scanning beam upon the curve line image is modified by the addition of a semicylindrical optical lens having a length at least equal to the transverse dimension of the recording material and arranged with its longitudinal axis lying in the plane of the scanning locus of the camera tube whereby the optical image received by the camera tube is selectively magnified in a direction parallel to the recording direction to sharpen the video output pulses generated by the curve line segments having a large directional component parallel to the scanning locus of the camera tube.
    Type: Grant
    Filed: November 10, 1977
    Date of Patent: May 1, 1979
    Inventor: Soichiro Yasunaga
  • Patent number: 4081745
    Abstract: An unknown voltage to be measured is applied to the input of an automatic servo-actuated potentiometer which when unbalanced by an unknown voltage is servo-actuated to restore a balanced condition with the extent of the displacement necessary for such restoration being indicated on a scale as an analog measure of the input voltage. The absolute value of the voltage across the potentiometer is measured and is supplied to a balance detecting circuit which upon a change in said absolute value actuates a control gate to transmit pulses from a pulse generator to a set of binary counters which have their output signals applied through a binary-decimal converter to a digital display. The counter output signals are also converted to an analog voltage which is fed to the balance detecting circuit and when the converted analog voltage equals the absolute detected voltage, the pulse count is terminated.
    Type: Grant
    Filed: March 23, 1976
    Date of Patent: March 28, 1978
    Inventor: Soichiro Yasunaga
  • Patent number: 4053734
    Abstract: Method and apparatus for reading a curve line present on a recording medium and providing a digital or analog output indicative of the path of such curve line, wherein an optically visible curve line present on a recording material is caused to move relatively to an electronic camera tube; the electronic camera tube photoelectronically scans an optical image with a narrow scanning beam moving across the medium along a locus extending transversely of the recording direction and generates a video output signal containing for each scanning period a voltage train varying in accordance with the optical intensity of the segment of the medium being scanned and which contains at least one pulse produced when the scanning beam crosses the curve line image; the voltage train for each such scanning period is inverted in polarity and combined additively with the voltage train produced during a prior scanning period to give when the variations in such two signal trains are out of synchronism an output signal having a magn
    Type: Grant
    Filed: June 22, 1976
    Date of Patent: October 11, 1977
    Inventor: Soichiro Yasunaga