Patents by Inventor Som S. Swamy

Som S. Swamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6391220
    Abstract: Methods and articles used to fabricate flexible circuit structures are disclosed. The methods include depositing a release layer on substrate, and then forming a conductive laminate on the release layer. After the release layer is formed, the conductive laminate can be easily separated by the substrate to eventually form a flexible circuit structure.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: May 21, 2002
    Assignee: Fujitsu Limited, Inc.
    Inventors: Lei Zhang, Solomon Beilin, Som S. Swamy, James J. Roman
  • Patent number: 6159666
    Abstract: Normally, a positive photoresist is developed with an alkaline aqueous solution to form patterns, and is subsequently stripped with an organic solvent after the photoresist has served its function. Such strippers are relatively toxic and damaging to the environment, and cannot be handled by standard (community) waste-water treatment facilities. These strippers cannot be easily neutralized, and must be disposed of in a highly specialized and relatively expensive manner. The present invention provides a method of treating positive and negative photoresists during their usage as photo masks such that the photoresists may be removed by less toxic chemicals which can be readily neutralized and handled by conventional waste water treatment facilities.
    Type: Grant
    Filed: January 8, 1999
    Date of Patent: December 12, 2000
    Assignee: Fijitsu Limited
    Inventors: David D. Ngo, Som S. Swamy
  • Patent number: 6102710
    Abstract: An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed through rigid segments and signals are routed through a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: August 15, 2000
    Assignee: Fujitsu Limited
    Inventors: Solomon I. Beilin, William T. Chou, David Kudzuma, Michael G. Lee, Michael G. Peters, James J. Roman, Som S. Swamy, Wen-chou Vincent Wang, Larry L. Moresco, Teruo Murase
  • Patent number: 5854534
    Abstract: An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed though rigid segments and signals are routed though a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: December 29, 1998
    Assignee: Fujitsu Limited
    Inventors: Solomon I. Beilin, William T. Chou, David Kudzuma, Michael G. Lee, Michael G. Peters, James J. Roman, Som S. Swamy, Wen-chou Vincent Wang, Larry L. Moresco, Teruo Murase
  • Patent number: 5778529
    Abstract: A multichip module substrate for use in a three-dimensional multichip module, and methods of making the same, are disclosed. The substrate comprises a thin film structure, for routing signals to and from integrated circuit chips, formed over a rigid support base. Apertures are formed in the support base exposing the underside of the thin film structure, thereby allowing high density connectors to be mounted on both surfaces of the thin film structure, greatly enhancing the ability to communicate signals between adjacent substrates in the chip module. This avoids the need to route the signals either through the rigid support base or to the edges of the thin film structure. Power and ground, which do not require a high connection density, are routed in low impedance paths through the support base. Preferably, the thin film structure is made of alternating layers of patterned metal, such as copper, and a low dielectric organic polymer, such as a polyimide.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: July 14, 1998
    Assignee: Fujitsu Limited
    Inventors: Solomon I. Beilin, William T. Chou, David Kudzuma, Michael G. Lee, Teruo Murase, Michael G. Peters, James J. Roman, Som S. Swamy, Wen-Chou Vincent Wang
  • Patent number: 5544017
    Abstract: A multichip module substrate for use in a three-dimensional multichip module, and methods of making the same, are disclosed. The substrate comprises a thin film structure, for routing signals to and from integrated circuit chips, formed over a rigid support base. Apertures are formed in the support base exposing the underside of the thin film structure, thereby allowing high density connectors to be mounted on both surfaces of the thin film structure, greatly enhancing the ability to communicate signals between adjacent substrates in the chip module. This avoids the need to route the signals either through the rigid support base or to the edges of the thin film structure. Power and ground, which do not require a high connection density, are routed in low impedance paths through the support base. Preferably, the thin film structure is made of alternating layers of patterned metal, such as copper, and a low dielectric organic polymer, such as a polyimide.
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: August 6, 1996
    Assignee: Fujitsu Limited
    Inventors: Solomon I. Beilin, William T. Chou, David Kudzuma, Michael G. Lee, Teruo Murase, Michael G. Peters, James J. Roman, Som S. Swamy, Wen-chou V. Wang
  • Patent number: 5419038
    Abstract: A three dimensional thin-film interconnector is fabricated by depositing a dielectric layer onto the surface of a substrate, depositing a layer of conductive material onto the dielectric layer to form a signal plane, depositing a dielectric layer onto the surface of the signal plane, forming a plurality of through holes in the dielectric layer that extend to the signal plane, and filling the through holes with an electrically conductive material to form vias. The sequence of forming a signal plane, depositing a dielectric layer, forming a plurality of through holes, and filling the through holes is repeated until a predetermined number of signal planes and a predetermined arrangement of vias are obtained. The through holes are formed at locations in the dielectric layers corresponding to both predetermined electrical connections and the vias in a preceding dielectric layer. The signal planes are formed at different locations on the substrate.
    Type: Grant
    Filed: June 17, 1993
    Date of Patent: May 30, 1995
    Assignee: Fujitsu Limited
    Inventors: Wen-chou V. Wang, Solomon I. Beilin, William T. Chou, David Kudzuma, Michael G. Lee, Michael G. Peters, James J. Roman, Som S. Swamy