Patents by Inventor Soo-hwan Lee
Soo-hwan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967269Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.Type: GrantFiled: October 4, 2022Date of Patent: April 23, 2024Assignee: Samsung Display Co., Ltd.Inventors: Chul Kyu Kang, Sung Hwan Kim, Soo Hee Oh, Dong Sun Lee, Sang Moo Choi
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Patent number: 11688716Abstract: Provided is a semiconductor chip mounting tape. The semiconductor chip mounting tape comprises a tape base film including first and second surfaces opposite to each other; and an adhesive film including a third surface facing the first surface of the tape base film, and a fourth surface opposite to the third surface, wherein the adhesive film includes a plurality of voids therein, and the fourth surface of the adhesive film may be adhered to a semiconductor chip.Type: GrantFiled: February 5, 2021Date of Patent: June 27, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Soo Hwan Lee
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Patent number: 11583948Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.Type: GrantFiled: February 1, 2022Date of Patent: February 21, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Soo-Hwan Lee
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Publication number: 20220389160Abstract: The present invention relates to a technique for effective intranasal delivery to the brain. More specifically, the present invention is used for diagnosing, preventing or treating central nervous system encephalopathy, neurodegenerative diseases or brain tumor by effectively delivering to the brain a pH-responsive and bioreducible PPA polymer, which can be used as a drug carrier, by means of nasal administration.Type: ApplicationFiled: November 6, 2020Publication date: December 8, 2022Applicants: Industry-University Cooperation Foundation Hanyang University, MASSACHUSETTS INSTITUTE OF TECHNOLOGYInventors: Chae Ok YUN, Soo Hwan LEE, Dayananda KASALA, Robert S LANGER
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Publication number: 20220152718Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.Type: ApplicationFiled: February 1, 2022Publication date: May 19, 2022Inventor: Soo-Hwan LEE
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Patent number: 11278979Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.Type: GrantFiled: April 11, 2019Date of Patent: March 22, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventor: Soo-Hwan Lee
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Patent number: 11195774Abstract: A semiconductor package includes a mounting substrate, a first semiconductor chip on the mounting substrate and electrically connected to the mounting substrate, a heat dissipation element on an upper surface of the first semiconductor chip, where the heat dissipation element comprises a sidewall comprising an inclined surface and an upper surface directly connected to the inclined surface, and a package molding portion on the mounting substrate and the inclined surface of the heat dissipation element. The package molding portion exposes at least a portion of the upper surface of the heat dissipation element, the upper surface of the heat dissipation element is parallel to the upper surface of the first semiconductor chip, and an angle formed by the upper surface of the heat dissipation element and the inclined surface of the heat dissipation element is an obtuse angle.Type: GrantFiled: March 24, 2020Date of Patent: December 7, 2021Inventor: Soo Hwan Lee
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Publication number: 20210358882Abstract: Provided is a semiconductor chip mounting tape. The semiconductor chip mounting tape comprises a tape base film including first and second surfaces opposite to each other; and an adhesive film including a third surface facing the first surface of the tape base film, and a fourth surface opposite to the third surface, wherein the adhesive film includes a plurality of voids therein, and the fourth surface of the adhesive film may be adhered to a semiconductor chip.Type: ApplicationFiled: February 5, 2021Publication date: November 18, 2021Applicant: Samsung Electronics Co., Ltd.Inventor: Soo Hwan LEE
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Publication number: 20210057240Abstract: A semiconductor package includes a mounting substrate, a first semiconductor chip on the mounting substrate and electrically connected to the mounting substrate, a heat dissipation element on an upper surface of the first semiconductor chip, where the heat dissipation element comprises a sidewall comprising an inclined surface and an upper surface directly connected to the inclined surface, and a package molding portion on the mounting substrate and the inclined surface of the heat dissipation element. The package molding portion exposes at least a portion of the upper surface of the heat dissipation element, the upper surface of the heat dissipation element is parallel to the upper surface of the first semiconductor chip, and an angle formed by the upper surface of the heat dissipation element and the inclined surface of the heat dissipation element is an obtuse angle.Type: ApplicationFiled: March 24, 2020Publication date: February 25, 2021Inventor: Soo Hwan Lee
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Publication number: 20200108459Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.Type: ApplicationFiled: April 11, 2019Publication date: April 9, 2020Inventor: Soo-Hwan LEE
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Patent number: 9680074Abstract: An optical device may include a first surface having a shape of a quadrangle; and a second surface disposed to be opposite to the first surface and comprising a convex curved surface. The optical device has an aspherical shape in a cross-section taken along a diagonal direction of the quadrangle and has a semicircular shape in a cross-section taken along a direction connecting a central portion of a first side of the quadrangle and a central portion of a second side opposite to the first side of the quadrangle. In a cross-sectional view of the optical device, the second surface is continuously varied between the semicircular shape of the cross-section and the aspherical shape of the cross-section.Type: GrantFiled: March 2, 2016Date of Patent: June 13, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji Hoon Yun, Jong Sup Song, Soo Hwan Lee, Saesil Kim, Mi Jeong Yun
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Publication number: 20160380169Abstract: An optical device may include a first surface having a shape of a quadrangle; and a second surface disposed to be opposite to the first surface and comprising a convex curved surface. The optical device has an aspherical shape in a cross-section taken along a diagonal direction of the quadrangle and has a semicircular shape in a cross-section taken along a direction connecting a central portion of a first side of the quadrangle and a central portion of a second side opposite to the first side of the quadrangle. In a cross-sectional view of the optical device, the second surface is continuously varied between the semicircular shape of the cross-section and the aspherical shape of the cross-section.Type: ApplicationFiled: March 2, 2016Publication date: December 29, 2016Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji Hoon YUN, Jong Sup SONG, Soo Hwan LEE, Saesil KIM, Mi Jeong YUN
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Patent number: 9188300Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an to LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: GrantFiled: December 18, 2014Date of Patent: November 17, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
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Patent number: 9161251Abstract: A data transmission system that determines data transmission power using a virtual cell is provided. A base station may receive transmission data from a plurality of cooperative base stations positioned around the base station, and model terminals receiving an interference signal from the base station and the plurality of cooperative base stations into a virtual cell. The base station may calculate the influence of the interference signal transmitted to the terminal, using the virtual cell, and determine a transmission power for a plurality of frequency bands based on the interference signal.Type: GrantFiled: January 19, 2011Date of Patent: October 13, 2015Assignees: Samsung Electronics Co., Ltd., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Won Jong Noh, Yung Yi, Tae Soo Kwon, Soo Hwan Lee, Chang Yong Shin
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Publication number: 20150103547Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an to LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: ApplicationFiled: December 18, 2014Publication date: April 16, 2015Inventors: Hee Dong KIM, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
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Patent number: 8921883Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: GrantFiled: January 9, 2014Date of Patent: December 30, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
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Patent number: 8882319Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: GrantFiled: May 18, 2012Date of Patent: November 11, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
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Publication number: 20140124815Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: ApplicationFiled: January 9, 2014Publication date: May 8, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hee Dong KIM, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
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Patent number: 8717986Abstract: Provided is a data transmission system that may determine a multiple input multiple output dynamic spectrum management (MIMO-DSM) operation mode of a base station based on information associated with a data transmission route and a computational capability of each base station. A terminal may generate feedback information based on a cooperation level between base stations and may transmit the generated feedback information to a serving base station. The serving base station may select terminals that may receive data from among a plurality of terminals through a MIMO-DSM algorithm and a user scheduling based on the feedback information.Type: GrantFiled: November 4, 2010Date of Patent: May 6, 2014Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and TechnologyInventors: Won Jong Noh, Yung Yi, Tae Soo Kwon, Soo Hwan Lee, Chang Yong Shin
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Publication number: 20120294025Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.Type: ApplicationFiled: May 18, 2012Publication date: November 22, 2012Inventors: Hee Dong KIM, Moo Youn PARK, Soo Hwan LEE, Hee Seok PARK