Patents by Inventor Soo-hwan Lee

Soo-hwan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967269
    Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: April 23, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chul Kyu Kang, Sung Hwan Kim, Soo Hee Oh, Dong Sun Lee, Sang Moo Choi
  • Patent number: 11688716
    Abstract: Provided is a semiconductor chip mounting tape. The semiconductor chip mounting tape comprises a tape base film including first and second surfaces opposite to each other; and an adhesive film including a third surface facing the first surface of the tape base film, and a fourth surface opposite to the third surface, wherein the adhesive film includes a plurality of voids therein, and the fourth surface of the adhesive film may be adhered to a semiconductor chip.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Soo Hwan Lee
  • Patent number: 11583948
    Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.
    Type: Grant
    Filed: February 1, 2022
    Date of Patent: February 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Soo-Hwan Lee
  • Publication number: 20220389160
    Abstract: The present invention relates to a technique for effective intranasal delivery to the brain. More specifically, the present invention is used for diagnosing, preventing or treating central nervous system encephalopathy, neurodegenerative diseases or brain tumor by effectively delivering to the brain a pH-responsive and bioreducible PPA polymer, which can be used as a drug carrier, by means of nasal administration.
    Type: Application
    Filed: November 6, 2020
    Publication date: December 8, 2022
    Applicants: Industry-University Cooperation Foundation Hanyang University, MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Chae Ok YUN, Soo Hwan LEE, Dayananda KASALA, Robert S LANGER
  • Publication number: 20220152718
    Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.
    Type: Application
    Filed: February 1, 2022
    Publication date: May 19, 2022
    Inventor: Soo-Hwan LEE
  • Patent number: 11278979
    Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: March 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Soo-Hwan Lee
  • Patent number: 11195774
    Abstract: A semiconductor package includes a mounting substrate, a first semiconductor chip on the mounting substrate and electrically connected to the mounting substrate, a heat dissipation element on an upper surface of the first semiconductor chip, where the heat dissipation element comprises a sidewall comprising an inclined surface and an upper surface directly connected to the inclined surface, and a package molding portion on the mounting substrate and the inclined surface of the heat dissipation element. The package molding portion exposes at least a portion of the upper surface of the heat dissipation element, the upper surface of the heat dissipation element is parallel to the upper surface of the first semiconductor chip, and an angle formed by the upper surface of the heat dissipation element and the inclined surface of the heat dissipation element is an obtuse angle.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: December 7, 2021
    Inventor: Soo Hwan Lee
  • Publication number: 20210358882
    Abstract: Provided is a semiconductor chip mounting tape. The semiconductor chip mounting tape comprises a tape base film including first and second surfaces opposite to each other; and an adhesive film including a third surface facing the first surface of the tape base film, and a fourth surface opposite to the third surface, wherein the adhesive film includes a plurality of voids therein, and the fourth surface of the adhesive film may be adhered to a semiconductor chip.
    Type: Application
    Filed: February 5, 2021
    Publication date: November 18, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Soo Hwan LEE
  • Publication number: 20210057240
    Abstract: A semiconductor package includes a mounting substrate, a first semiconductor chip on the mounting substrate and electrically connected to the mounting substrate, a heat dissipation element on an upper surface of the first semiconductor chip, where the heat dissipation element comprises a sidewall comprising an inclined surface and an upper surface directly connected to the inclined surface, and a package molding portion on the mounting substrate and the inclined surface of the heat dissipation element. The package molding portion exposes at least a portion of the upper surface of the heat dissipation element, the upper surface of the heat dissipation element is parallel to the upper surface of the first semiconductor chip, and an angle formed by the upper surface of the heat dissipation element and the inclined surface of the heat dissipation element is an obtuse angle.
    Type: Application
    Filed: March 24, 2020
    Publication date: February 25, 2021
    Inventor: Soo Hwan Lee
  • Publication number: 20200108459
    Abstract: A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.
    Type: Application
    Filed: April 11, 2019
    Publication date: April 9, 2020
    Inventor: Soo-Hwan LEE
  • Patent number: 9680074
    Abstract: An optical device may include a first surface having a shape of a quadrangle; and a second surface disposed to be opposite to the first surface and comprising a convex curved surface. The optical device has an aspherical shape in a cross-section taken along a diagonal direction of the quadrangle and has a semicircular shape in a cross-section taken along a direction connecting a central portion of a first side of the quadrangle and a central portion of a second side opposite to the first side of the quadrangle. In a cross-sectional view of the optical device, the second surface is continuously varied between the semicircular shape of the cross-section and the aspherical shape of the cross-section.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: June 13, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hoon Yun, Jong Sup Song, Soo Hwan Lee, Saesil Kim, Mi Jeong Yun
  • Publication number: 20160380169
    Abstract: An optical device may include a first surface having a shape of a quadrangle; and a second surface disposed to be opposite to the first surface and comprising a convex curved surface. The optical device has an aspherical shape in a cross-section taken along a diagonal direction of the quadrangle and has a semicircular shape in a cross-section taken along a direction connecting a central portion of a first side of the quadrangle and a central portion of a second side opposite to the first side of the quadrangle. In a cross-sectional view of the optical device, the second surface is continuously varied between the semicircular shape of the cross-section and the aspherical shape of the cross-section.
    Type: Application
    Filed: March 2, 2016
    Publication date: December 29, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hoon YUN, Jong Sup SONG, Soo Hwan LEE, Saesil KIM, Mi Jeong YUN
  • Patent number: 9188300
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an to LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
  • Patent number: 9161251
    Abstract: A data transmission system that determines data transmission power using a virtual cell is provided. A base station may receive transmission data from a plurality of cooperative base stations positioned around the base station, and model terminals receiving an interference signal from the base station and the plurality of cooperative base stations into a virtual cell. The base station may calculate the influence of the interference signal transmitted to the terminal, using the virtual cell, and determine a transmission power for a plurality of frequency bands based on the interference signal.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: October 13, 2015
    Assignees: Samsung Electronics Co., Ltd., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Won Jong Noh, Yung Yi, Tae Soo Kwon, Soo Hwan Lee, Chang Yong Shin
  • Publication number: 20150103547
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an to LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Application
    Filed: December 18, 2014
    Publication date: April 16, 2015
    Inventors: Hee Dong KIM, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
  • Patent number: 8921883
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: December 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
  • Patent number: 8882319
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Dong Kim, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
  • Publication number: 20140124815
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Application
    Filed: January 9, 2014
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee Dong KIM, Moo Youn Park, Soo Hwan Lee, Hee Seok Park
  • Patent number: 8717986
    Abstract: Provided is a data transmission system that may determine a multiple input multiple output dynamic spectrum management (MIMO-DSM) operation mode of a base station based on information associated with a data transmission route and a computational capability of each base station. A terminal may generate feedback information based on a cooperation level between base stations and may transmit the generated feedback information to a serving base station. The serving base station may select terminals that may receive data from among a plurality of terminals through a MIMO-DSM algorithm and a user scheduling based on the feedback information.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: May 6, 2014
    Assignees: Samsung Electronics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Won Jong Noh, Yung Yi, Tae Soo Kwon, Soo Hwan Lee, Chang Yong Shin
  • Publication number: 20120294025
    Abstract: An LED assembly according to an embodiment of the present invention may improve dark regions generated between LED chips by employing a first reflective layer between the LED chips. By employing a transparent optical layer or an optical layer including a scattering particle between an LED chip and a phosphor layer, direct contact between the LED chip and the phosphor layer may be avoided, thereby preventing a low light extraction efficiency. Further, by employing a second reflection layer on side surfaces of an LED chip, an optical layer, and a phosphor layer, a relatively high contrast may be obtained. An LED assembly may enhance contrast through a reflective layer while increasing light extraction efficiency by including a scattering particle in a phosphor layer.
    Type: Application
    Filed: May 18, 2012
    Publication date: November 22, 2012
    Inventors: Hee Dong KIM, Moo Youn PARK, Soo Hwan LEE, Hee Seok PARK