Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: A hybrid device including a silicon based MOSFET operatively connected with a GaN based device.

Abstract: A hybrid device including a silicon based MOSFET operatively connected with a GaN based device.

Abstract: A hybrid device including a silicon based MOSFET operatively connected with a GaN based device.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.

Abstract: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.

Abstract: A hybrid device including a silicon based MOSFET operatively connected with a GaN based device.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: A silicon carbide semiconductor field effect transistor and a silicon metal oxide semiconductor field effect transistor are packaged as a hybrid field effect transistor having a high voltage resistance provided by the silicon carbide device and a low switch-on resistance provided by the silicon device. The two devices are co-packaged electrode-on-electrode. A die-on-die configuration reduces the footprint of the hybrid device, and a side-by-side configuration provides an increased area for thermal management of the hybrid device.

Abstract: An improved superjunction semiconductor device includes a charged balanced pylon in a body region, where a top of the pylon is large to create slight charge imbalance. A MOSgated structure is formed over the top of the pylon and designed to conduct current through the pylon. By increasing a dimension of the top of the pylon, the resulting device is less susceptible to variations in manufacturing tolerances to obtain a good breakdown voltage and improved device ruggedness.

Abstract: A lateral conduction superjunction device has bidirectional conduction characteristics. In a first embodiment, spaced vertical trenches in a P substrate are lined with N diffusions. A central MOSgate structure is disposed centrally in the parallel trenches and source and drain electrodes are at the opposite respective ends of the trenches. In a second embodiment, flat layers of alternately opposite conductivity types have source and drain regions at their opposite ends. A trench MOSgate is disposed between the source region at one end of the layers to enable bidirectional currant flow through the stocked layers.

Abstract: A process for insulating the interior of the trenches of trench type MOSgated devices in which a capping oxide is formed over the top of the trenches to span approximately a 3 micron gap and then reflowing the oxide at 1050° C. in pure O2 to flush air out of the trenches and leaving an at least partially evacuated sealed volume in each of the trenches.

Abstract: A lateral conduction superjunction semiconductor device has a plurality of spaced vertical trenches in a junction receiving layer of P− silicon. An N− diffusion lines the walls of the trench and the concentration and thickness of the N− diffusion and P− mesas are arranged to deplete fully in reverse blocking operation. A MOSgate structure is connected at one end of the trenches and a drain is connected at its other end. An N− further layer or an insulation oxide layer may be interposed between a P− substrate and the P− junction receiving layer.

Abstract: A silicon carbide semiconductor field effect transistor and a silicon metal oxide semiconductor field effect transistor are packaged as a hybrid field effect transistor having a high voltage resistance provided by the silicon carbide device and a low switch-on resistance provided by the silicon device. The two devices are co-packaged electrode-on-electrode. A die-on-die configuration reduces the footprint of the hybrid device, and a side-by-side configuration provides an increased area for thermal management of the hybrid device.

Abstract: A polysilicon FET is built atop a SiC diode to form a MOSgated device. The polysilicon FET includes an invertible layer of polysilicon atop the surface of a SiC diode which has spaced diode diffusions. A MOSgate is formed on the polysilicon layer and the energization of the gate causes an inversion channel in the invertible layer to form a majority carrier conduction path from a top source electrode to a bottom drain electrode. Forward voltage is blocked in part by the polysilicon FET and in larger part by the depletion of the silicon carbide area between the spaced diode diffusions.

Abstract: A lateral conduction superjunction device has bidirectional conduction characteristics. In a first embodiment, spaced vertical trenches in a P substrate are lined with N diffusions. A central MOSgate structure is disposed centrally in the parallel trenches and source and drain electrodes are at the opposite respective ends of the trenches. In a second embodiment, flat layers of alternately opposite conductivity types have source and drain regions at their opposite ends. A trench MOSgate is disposed between the source region at one end of the layers to enable bidirectional currant flow through the stocked layers.

Abstract: A process for insulating the interior of the trenches of trench type MOSgated devices in which a capping oxide is formed over the top of the trenches to span approximately a 3 micron gap and then reflowing the oxide at 1050° C. in pure O2 to flush air out of the trenches and leaving an at least partially evacuated sealed volume in each of the trenches.

Abstract: A high voltage vertical conduction semiconductor device has a plurality of deep trenches or holes in a lightly doped body of one conductivity type. A diffusion of the other conductivity type is formed in the trench walls to a depth and a concentration which matches that of the body so that, under reverse blocking, both regions fully deplete. The elongated trench or hole is filled with a dielectric which may be a composite of nitride and oxide layers having a lateral dimension change matched to that of the silicon. The filler may also be a highly resistive SIPOS which permits leakage current flow from source to drain to ensure a uniform electric field distribution along the length of the trench during blocking.